cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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loongson,ls1x-intc.txt (668B)

      1Loongson ls1x Interrupt Controller
      2
      3Required properties:
      4
      5- compatible : should be "loongson,ls1x-intc". Valid strings are:
      6
      7- reg : Specifies base physical address and size of the registers.
      8- interrupt-controller : Identifies the node as an interrupt controller
      9- #interrupt-cells : Specifies the number of cells needed to encode an
     10  interrupt source. The value shall be 2.
     11- interrupts : Specifies the CPU interrupt the controller is connected to.
     12
     13Example:
     14
     15intc: interrupt-controller@1fd01040 {
     16	compatible = "loongson,ls1x-intc";
     17	reg = <0x1fd01040 0x18>;
     18
     19	interrupt-controller;
     20	#interrupt-cells = <2>;
     21
     22	interrupt-parent = <&cpu_intc>;
     23	interrupts = <2>;
     24};