cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rda,8810pl-intc.txt (1070B)


      1RDA Micro RDA8810PL Interrupt Controller
      2
      3The interrupt controller in RDA8810PL SoC is a custom interrupt controller
      4which supports up to 32 interrupts.
      5
      6Required properties:
      7
      8- compatible: Should be "rda,8810pl-intc".
      9- reg: Specifies base physical address of the registers set.
     10- interrupt-controller: Identifies the node as an interrupt controller.
     11- #interrupt-cells: Specifies the number of cells needed to encode an
     12  interrupt source. The value shall be 2.
     13
     14The interrupt sources are as follows:
     15
     16ID	Name
     17------------
     180:	PULSE_DUMMY
     191:	I2C
     202:	NAND_NFSC
     213:	SDMMC1
     224:	SDMMC2
     235:	SDMMC3
     246:	SPI1
     257:	SPI2
     268:	SPI3
     279:	UART1
     2810:	UART2
     2911:	UART3
     3012:	GPIO1
     3113:	GPIO2
     3214:	GPIO3
     3315:	KEYPAD
     3416:	TIMER
     3517:	TIMEROS
     3618:	COMREG0
     3719:	COMREG1
     3820:	USB
     3921:	DMC
     4022:	DMA
     4123:	CAMERA
     4224:	GOUDA
     4325:	GPU
     4426:	VPU_JPG
     4527:	VPU_HOST
     4628:	VOC
     4729:	AUIFC0
     4830:	AUIFC1
     4931:	L2CC
     50
     51Example:
     52		apb@20800000 {
     53			compatible = "simple-bus";
     54			...
     55			intc: interrupt-controller@0 {
     56				compatible = "rda,8810pl-intc";
     57				reg = <0x0 0x1000>;
     58				interrupt-controller;
     59				#interrupt-cells = <2>;
     60			};
     61		};