cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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realtek,rtl-intc.yaml (1180B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Realtek RTL SoC interrupt controller devicetree bindings
      8
      9maintainers:
     10  - Birger Koblitz <mail@birger-koblitz.de>
     11  - Bert Vermeulen <bert@biot.com>
     12  - John Crispin <john@phrozen.org>
     13
     14properties:
     15  compatible:
     16    const: realtek,rtl-intc
     17
     18  "#interrupt-cells":
     19    const: 1
     20
     21  reg:
     22    maxItems: 1
     23
     24  interrupts:
     25    maxItems: 1
     26
     27  interrupt-controller: true
     28
     29  "#address-cells":
     30    const: 0
     31
     32  interrupt-map:
     33    description: Describes mapping from SoC interrupts to CPU interrupts
     34
     35required:
     36  - compatible
     37  - reg
     38  - "#interrupt-cells"
     39  - interrupt-controller
     40  - "#address-cells"
     41  - interrupt-map
     42
     43additionalProperties: false
     44
     45examples:
     46  - |
     47    intc: interrupt-controller@3000 {
     48      compatible = "realtek,rtl-intc";
     49      #interrupt-cells = <1>;
     50      interrupt-controller;
     51      reg = <0x3000 0x20>;
     52      #address-cells = <0>;
     53      interrupt-map =
     54              <31 &cpuintc 2>,
     55              <30 &cpuintc 1>,
     56              <29 &cpuintc 5>;
     57    };