cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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socionext,synquacer-exiu.txt (1074B)

      1Socionext SynQuacer External Interrupt Unit (EXIU)
      2
      3The Socionext Synquacer SoC has an external interrupt unit (EXIU)
      4that forwards a block of 32 configurable input lines to 32 adjacent
      5level-high type GICv3 SPIs.
      6
      7Required properties:
      8
      9- compatible           : Should be "socionext,synquacer-exiu".
     10- reg                  : Specifies base physical address and size of the
     11                         control registers.
     12- interrupt-controller : Identifies the node as an interrupt controller.
     13- #interrupt-cells     : Specifies the number of cells needed to encode an
     14                         interrupt source. The value must be 3.
     15- socionext,spi-base   : The SPI number of the first SPI of the 32 adjacent
     16                         ones the EXIU forwards its interrups to.
     17
     18Notes:
     19
     20- Only SPIs can use the EXIU as an interrupt parent.
     21
     22Example:
     23
     24	exiu: interrupt-controller@510c0000 {
     25		compatible = "socionext,synquacer-exiu";
     26		reg = <0x0 0x510c0000 0x0 0x20>;
     27		interrupt-controller;
     28		interrupt-parent = <&gic>;
     29		#interrupt-cells = <3>;
     30		socionext,spi-base = <112>;
     31	};