cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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st,sti-irq-syscfg.txt (1282B)

      1STMicroelectronics STi System Configuration Controlled IRQs
      2-----------------------------------------------------------
      3
      4On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
      5and PL310 L2 Cache IRQs are controlled using System Configuration registers.
      6This driver is used to unmask them prior to use.
      7
      8Required properties:
      9- compatible	: Should be set to one of:
     10			"st,stih415-irq-syscfg"
     11			"st,stih416-irq-syscfg"
     12			"st,stih407-irq-syscfg"
     13			"st,stid127-irq-syscfg"
     14- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
     15- st,irq-device	: Array of IRQs to enable - should be 2 in length
     16- st,fiq-device	: Array of FIQs to enable - should be 2 in length
     17
     18Optional properties:
     19- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
     20		  these IRQs using bitwise logic.  A number of defines have been
     21		  provided for convenience:
     22			ST_IRQ_SYSCFG_EXT_1_INV
     23			ST_IRQ_SYSCFG_EXT_2_INV
     24			ST_IRQ_SYSCFG_EXT_3_INV
     25Example:
     26
     27irq-syscfg {
     28	compatible    = "st,stih416-irq-syscfg";
     29	st,syscfg     = <&syscfg_cpu>;
     30	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
     31			<ST_IRQ_SYSCFG_PMU_1>;
     32	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
     33			<ST_IRQ_SYSCFG_DISABLED>;
     34	st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
     35};