cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sprd,iommu.yaml (1277B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright 2020 Unisoc Inc.
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Unisoc IOMMU and Multi-media MMU
      9
     10maintainers:
     11  - Chunyan Zhang <zhang.lyra@gmail.com>
     12
     13properties:
     14  compatible:
     15    enum:
     16      - sprd,iommu-v1
     17
     18  "#iommu-cells":
     19    const: 0
     20    description:
     21      Unisoc IOMMUs are all single-master IOMMU devices, therefore no
     22      additional information needs to associate with its master device.
     23      Please refer to the generic bindings document for more details,
     24      Documentation/devicetree/bindings/iommu/iommu.txt
     25
     26  reg:
     27    maxItems: 1
     28
     29  clocks:
     30    description:
     31      Reference to a gate clock phandle, since access to some of IOMMUs are
     32      controlled by gate clock, but this is not required.
     33
     34required:
     35  - compatible
     36  - reg
     37  - "#iommu-cells"
     38
     39additionalProperties: false
     40
     41examples:
     42  - |
     43    iommu_disp: iommu@63000800 {
     44      compatible = "sprd,iommu-v1";
     45      reg = <0x63000800 0x80>;
     46      #iommu-cells = <0>;
     47    };
     48
     49  - |
     50    iommu_jpg: iommu@62300300 {
     51      compatible = "sprd,iommu-v1";
     52      reg = <0x62300300 0x80>;
     53      #iommu-cells = <0>;
     54      clocks = <&mm_gate 1>;
     55    };
     56
     57...