cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hisilicon,hi6220-mailbox.txt (2398B)


      1Hisilicon Hi6220 Mailbox Driver
      2===============================
      3
      4Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
      5is unidirectional with a maximum message size of 8 words. I/O is
      6performed using register access (there is no DMA) and the cell
      7raises an interrupt when messages are received.
      8
      9Mailbox Device Node:
     10====================
     11
     12Required properties:
     13--------------------
     14- compatible:		Shall be "hisilicon,hi6220-mbox"
     15- reg:			Contains the mailbox register address range (base
     16			address and length); the first item is for IPC
     17			registers, the second item is shared buffer for
     18			slots.
     19- #mbox-cells:		Common mailbox binding property to identify the number
     20			of cells required for the mailbox specifier. Must be 3.
     21			<&phandle slot_id dst_irq ack_irq>
     22			  phandle: Label name of mailbox controller
     23			  slot_id: Slot id used either for TX or RX
     24			  dst_irq: IRQ identifier index number which used by MCU
     25			  ack_irq: IRQ identifier index number with generating a
     26			           TX/RX interrupt to application processor,
     27				   mailbox driver uses it to acknowledge interrupt
     28- interrupts:		Contains the interrupt information for the mailbox
     29			device. The format is dependent on which interrupt
     30			controller the SoCs use.
     31
     32Optional Properties:
     33--------------------
     34- hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
     35			use this flag to ask MCU to enable "automatic idle
     36			flag" mode or IRQ generated mode to acknowledge a TX
     37			completion.
     38
     39Example:
     40--------
     41
     42	mailbox: mailbox@f7510000 {
     43		compatible = "hisilicon,hi6220-mbox";
     44		reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
     45		      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox */
     46		interrupt-parent = <&gic>;
     47		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
     48		#mbox-cells = <3>;
     49	};
     50
     51
     52Mailbox client
     53===============
     54
     55Required properties:
     56--------------------
     57- compatible:		Many (See the client docs).
     58- mboxes:		Standard property to specify a Mailbox (See ./mailbox.txt)
     59			Cells must match 'mbox-cells' (See Mailbox Device Node above).
     60
     61Optional Properties:
     62--------------------
     63- mbox-names:		Name given to channels seen in the 'mboxes' property.
     64
     65Example:
     66--------
     67
     68	stub_clock: stub_clock {
     69		compatible = "hisilicon,hi6220-stub-clk";
     70		hisilicon,hi6220-clk-sram = <&sram>;
     71		#clock-cells = <1>;
     72		mbox-names = "mbox-tx", "mbox-rx";
     73		mboxes = <&mailbox 1 0 11>, <&mailbox 0 1 10>;
     74	};