cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mtk,adsp-mbox.yaml (1203B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Mediatek ADSP mailbox
      8
      9maintainers:
     10  - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
     11
     12description: |
     13  The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
     14  to communicate with ADSP by passing messages through two mailbox channels.
     15  The MTK ADSP mailbox IPC also provides the ability for one processor to
     16  signal the other processor using interrupts.
     17
     18properties:
     19  compatible:
     20    enum:
     21      - mediatek,mt8195-adsp-mbox
     22      - mediatek,mt8186-adsp-mbox
     23
     24  "#mbox-cells":
     25    const: 0
     26
     27  reg:
     28    maxItems: 1
     29
     30  interrupts:
     31    maxItems: 1
     32
     33required:
     34  - compatible
     35  - "#mbox-cells"
     36  - reg
     37  - interrupts
     38
     39additionalProperties: false
     40
     41examples:
     42  - |
     43    #include <dt-bindings/interrupt-controller/arm-gic.h>
     44    #include <dt-bindings/interrupt-controller/irq.h>
     45
     46    adsp_mailbox0:mailbox@10816000 {
     47        compatible = "mediatek,mt8195-adsp-mbox";
     48        #mbox-cells = <0>;
     49        reg = <0x10816000 0x1000>;
     50        interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
     51    };