cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nvidia,tegra186-hsp.yaml (3792B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
      8
      9maintainers:
     10  - Thierry Reding <thierry.reding@gmail.com>
     11  - Jon Hunter <jonathanh@nvidia.com>
     12
     13description: |
     14  The HSP modules are used for the processors to share resources and
     15  communicate together. It provides a set of hardware synchronization
     16  primitives for interprocessor communication. So the interprocessor
     17  communication (IPC) protocols can use hardware synchronization
     18  primitives, when operating between two processors not in an SMP
     19  relationship.
     20
     21  The features that HSP supported are shared mailboxes, shared
     22  semaphores, arbitrated semaphores and doorbells.
     23
     24  The mbox specifier of the "mboxes" property in the client node should
     25  contain two cells. The first cell determines the HSP type and the
     26  second cell is used to identify the mailbox that the client is going
     27  to use.
     28
     29  For shared mailboxes, the first cell composed of two fields:
     30    - bits 15..8:
     31        A bit mask of flags that further specifies the type of shared
     32        mailbox to be used (based on the data size). If no flag is
     33        specified then, 32-bit shared mailbox is used.
     34    - bits 7..0:
     35        Defines the type of the mailbox to be used. This field should be
     36        TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.
     37
     38  For doorbells, the second cell specifies the index of the doorbell to
     39  use.
     40
     41  For shared mailboxes, the second cell is composed of two fields:
     42    - bits 31..24:
     43        A bit mask of flags that further specify how the shared mailbox
     44        will be used. Valid flags are:
     45          - bit 31:
     46              Defines the direction of the mailbox. If set, the mailbox
     47              will be used as a producer (i.e. used to send data). If
     48              cleared, the mailbox is the consumer of data sent by a
     49              producer.
     50
     51    - bits 23..0:
     52        The index of the shared mailbox to use. The number of available
     53        mailboxes may vary by instance of the HSP block and SoC
     54        generation.
     55
     56    The following file contains definitions that can be used to
     57    construct mailbox specifiers:
     58
     59        <dt-bindings/mailbox/tegra186-hsp.h>
     60
     61properties:
     62  $nodename:
     63    pattern: "^hsp@[0-9a-f]+$"
     64
     65  compatible:
     66    oneOf:
     67      - const: nvidia,tegra186-hsp
     68      - const: nvidia,tegra194-hsp
     69      - items:
     70          - const: nvidia,tegra234-hsp
     71          - const: nvidia,tegra194-hsp
     72
     73  reg:
     74    maxItems: 1
     75
     76  interrupts:
     77    minItems: 1
     78    maxItems: 9
     79
     80  interrupt-names:
     81    oneOf:
     82      # shared interrupts are optional
     83      - items:
     84          - const: doorbell
     85
     86      - items:
     87          - const: doorbell
     88          - pattern: "^shared[0-7]$"
     89          - pattern: "^shared[0-7]$"
     90          - pattern: "^shared[0-7]$"
     91          - pattern: "^shared[0-7]$"
     92          - pattern: "^shared[0-7]$"
     93          - pattern: "^shared[0-7]$"
     94          - pattern: "^shared[0-7]$"
     95          - pattern: "^shared[0-7]$"
     96
     97      - items:
     98          - pattern: "^shared[0-7]$"
     99          - pattern: "^shared[0-7]$"
    100          - pattern: "^shared[0-7]$"
    101          - pattern: "^shared[0-7]$"
    102
    103  "#mbox-cells":
    104    const: 2
    105
    106additionalProperties: false
    107
    108examples:
    109  - |
    110    #include <dt-bindings/interrupt-controller/arm-gic.h>
    111    #include <dt-bindings/mailbox/tegra186-hsp.h>
    112
    113    hsp_top0: hsp@3c00000 {
    114        compatible = "nvidia,tegra186-hsp";
    115        reg = <0x03c00000 0xa0000>;
    116        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
    117        interrupt-names = "doorbell";
    118        #mbox-cells = <2>;
    119    };
    120
    121    client {
    122        mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_CCPLEX>;
    123    };