cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun50i-h6-vpu-g2.yaml (1298B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Hantro G2 VPU codec implemented on Allwinner H6 SoC
      9
     10maintainers:
     11  - Jernej Skrabec <jernej.skrabec@gmail.com>
     12
     13description:
     14  Hantro G2 video decode accelerator present on Allwinner H6 SoC.
     15
     16properties:
     17  compatible:
     18    const: allwinner,sun50i-h6-vpu-g2
     19
     20  reg:
     21    maxItems: 1
     22
     23  interrupts:
     24    maxItems: 1
     25
     26  clocks:
     27    items:
     28      - description: Bus Clock
     29      - description: Module Clock
     30
     31  clock-names:
     32    items:
     33      - const: bus
     34      - const: mod
     35
     36  resets:
     37    maxItems: 1
     38
     39required:
     40  - compatible
     41  - reg
     42  - interrupts
     43  - clocks
     44  - clock-names
     45  - resets
     46
     47additionalProperties: false
     48
     49examples:
     50  - |
     51    #include <dt-bindings/interrupt-controller/arm-gic.h>
     52    #include <dt-bindings/clock/sun50i-h6-ccu.h>
     53    #include <dt-bindings/reset/sun50i-h6-ccu.h>
     54
     55    video-codec-g2@1c00000 {
     56        compatible = "allwinner,sun50i-h6-vpu-g2";
     57        reg = <0x01c00000 0x1000>;
     58        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
     59        clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
     60        clock-names = "bus", "mod";
     61        resets = <&ccu RST_BUS_VP9>;
     62    };
     63
     64...