cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun8i-h3-deinterlace.yaml (1978B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner H3 Deinterlace Device Tree Bindings
      8
      9maintainers:
     10  - Jernej Skrabec <jernej.skrabec@siol.net>
     11  - Chen-Yu Tsai <wens@csie.org>
     12  - Maxime Ripard <mripard@kernel.org>
     13
     14description: |-
     15  The Allwinner H3 and later has a deinterlace core used for
     16  deinterlacing interlaced video content.
     17
     18properties:
     19  compatible:
     20    oneOf:
     21      - const: allwinner,sun8i-h3-deinterlace
     22      - items:
     23          - const: allwinner,sun8i-r40-deinterlace
     24          - const: allwinner,sun8i-h3-deinterlace
     25      - items:
     26          - const: allwinner,sun50i-a64-deinterlace
     27          - const: allwinner,sun8i-h3-deinterlace
     28
     29  reg:
     30    maxItems: 1
     31
     32  interrupts:
     33    maxItems: 1
     34
     35  clocks:
     36    items:
     37      - description: Deinterlace interface clock
     38      - description: Deinterlace module clock
     39      - description: Deinterlace DRAM clock
     40
     41  clock-names:
     42    items:
     43      - const: bus
     44      - const: mod
     45      - const: ram
     46
     47  resets:
     48    maxItems: 1
     49
     50  interconnects:
     51    maxItems: 1
     52
     53  interconnect-names:
     54    const: dma-mem
     55
     56required:
     57  - compatible
     58  - reg
     59  - interrupts
     60  - clocks
     61
     62additionalProperties: false
     63
     64examples:
     65  - |
     66    #include <dt-bindings/interrupt-controller/arm-gic.h>
     67    #include <dt-bindings/clock/sun8i-h3-ccu.h>
     68    #include <dt-bindings/reset/sun8i-h3-ccu.h>
     69
     70    deinterlace: deinterlace@1400000 {
     71        compatible = "allwinner,sun8i-h3-deinterlace";
     72        reg = <0x01400000 0x20000>;
     73        clocks = <&ccu CLK_BUS_DEINTERLACE>,
     74                 <&ccu CLK_DEINTERLACE>,
     75                 <&ccu CLK_DRAM_DEINTERLACE>;
     76        clock-names = "bus", "mod", "ram";
     77        resets = <&ccu RST_BUS_DEINTERLACE>;
     78        interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
     79        interconnects = <&mbus 9>;
     80        interconnect-names = "dma-mem";
     81    };
     82
     83...