cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dongwoon,dw9768.yaml (2713B)


      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2# Copyright (c) 2020 MediaTek Inc.
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9768.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Dongwoon Anatech DW9768 Voice Coil Motor (VCM) Lens Device Tree Bindings
      9
     10maintainers:
     11  - Dongchun Zhu <dongchun.zhu@mediatek.com>
     12
     13description: |-
     14  The Dongwoon DW9768 is a single 10-bit digital-to-analog (DAC) converter
     15  with 100 mA output current sink capability. VCM current is controlled with
     16  a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible)
     17  serial interface that operates at clock rates up to 1MHz. This chip
     18  integrates Advanced Actuator Control (AAC) technology and is intended for
     19  driving voice coil lenses in camera modules.
     20
     21properties:
     22  compatible:
     23    enum:
     24      - dongwoon,dw9768 # for DW9768 VCM
     25      - giantec,gt9769  # for GT9769 VCM
     26
     27  reg:
     28    maxItems: 1
     29
     30  vin-supply:
     31    description:
     32      Definition of the regulator used as Digital I/O voltage supply.
     33
     34  vdd-supply:
     35    description:
     36      Definition of the regulator used as Digital core voltage supply.
     37
     38  dongwoon,aac-mode:
     39    description:
     40      Indication of AAC mode select.
     41    $ref: "/schemas/types.yaml#/definitions/uint32"
     42    enum:
     43      - 1    #  AAC2 mode(operation time# 0.48 x Tvib)
     44      - 2    #  AAC3 mode(operation time# 0.70 x Tvib)
     45      - 3    #  AAC4 mode(operation time# 0.75 x Tvib)
     46      - 5    #  AAC8 mode(operation time# 1.13 x Tvib)
     47    default: 2
     48
     49  dongwoon,aac-timing:
     50    description:
     51      Number of AAC Timing count that controlled by one 6-bit period of
     52      vibration register AACT[5:0], the unit of which is 100 us.
     53    $ref: "/schemas/types.yaml#/definitions/uint32"
     54    default: 0x20
     55    minimum: 0x00
     56    maximum: 0x3f
     57
     58  dongwoon,clock-presc:
     59    description:
     60      Indication of VCM internal clock dividing rate select, as one multiple
     61      factor to calculate VCM ring periodic time Tvib.
     62    $ref: "/schemas/types.yaml#/definitions/uint32"
     63    enum:
     64      - 0    #  Dividing Rate -  2
     65      - 1    #  Dividing Rate -  1
     66      - 2    #  Dividing Rate -  1/2
     67      - 3    #  Dividing Rate -  1/4
     68      - 4    #  Dividing Rate -  8
     69      - 5    #  Dividing Rate -  4
     70    default: 1
     71
     72required:
     73  - compatible
     74  - reg
     75  - vin-supply
     76  - vdd-supply
     77
     78additionalProperties: false
     79
     80examples:
     81  - |
     82
     83    i2c {
     84        #address-cells = <1>;
     85        #size-cells = <0>;
     86
     87        dw9768: camera-lens@c {
     88            compatible = "dongwoon,dw9768";
     89            reg = <0x0c>;
     90
     91            vin-supply = <&mt6358_vcamio_reg>;
     92            vdd-supply = <&mt6358_vcama2_reg>;
     93            dongwoon,aac-timing = <0x39>;
     94        };
     95    };
     96
     97...