cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,msm8996-camss.yaml (8727B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Qualcomm CAMSS ISP
      9
     10maintainers:
     11  - Robert Foss <robert.foss@linaro.org>
     12  - Todor Tomov <todor.too@gmail.com>
     13
     14description: |
     15  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
     16
     17properties:
     18  compatible:
     19    const: qcom,msm8996-camss
     20
     21  clocks:
     22    minItems: 36
     23    maxItems: 36
     24
     25  clock-names:
     26    items:
     27      - const: top_ahb
     28      - const: ispif_ahb
     29      - const: csiphy0_timer
     30      - const: csiphy1_timer
     31      - const: csiphy2_timer
     32      - const: csi0_ahb
     33      - const: csi0
     34      - const: csi0_phy
     35      - const: csi0_pix
     36      - const: csi0_rdi
     37      - const: csi1_ahb
     38      - const: csi1
     39      - const: csi1_phy
     40      - const: csi1_pix
     41      - const: csi1_rdi
     42      - const: csi2_ahb
     43      - const: csi2
     44      - const: csi2_phy
     45      - const: csi2_pix
     46      - const: csi2_rdi
     47      - const: csi3_ahb
     48      - const: csi3
     49      - const: csi3_phy
     50      - const: csi3_pix
     51      - const: csi3_rdi
     52      - const: ahb
     53      - const: vfe0
     54      - const: csi_vfe0
     55      - const: vfe0_ahb
     56      - const: vfe0_stream
     57      - const: vfe1
     58      - const: csi_vfe1
     59      - const: vfe1_ahb
     60      - const: vfe1_stream
     61      - const: vfe_ahb
     62      - const: vfe_axi
     63
     64  interrupts:
     65    minItems: 10
     66    maxItems: 10
     67
     68  interrupt-names:
     69    items:
     70      - const: csiphy0
     71      - const: csiphy1
     72      - const: csiphy2
     73      - const: csid0
     74      - const: csid1
     75      - const: csid2
     76      - const: csid3
     77      - const: ispif
     78      - const: vfe0
     79      - const: vfe1
     80
     81  iommus:
     82    maxItems: 4
     83
     84  power-domains:
     85    items:
     86      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
     87      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
     88
     89  ports:
     90    $ref: /schemas/graph.yaml#/properties/ports
     91
     92    description:
     93      CSI input ports.
     94
     95    properties:
     96      port@0:
     97        $ref: /schemas/graph.yaml#/$defs/port-base
     98        unevaluatedProperties: false
     99        description:
    100          Input port for receiving CSI data.
    101
    102        properties:
    103          endpoint:
    104            $ref: video-interfaces.yaml#
    105            unevaluatedProperties: false
    106
    107            properties:
    108              data-lanes:
    109                description:
    110                  An array of physical data lanes indexes.
    111                  Position of an entry determines the logical
    112                  lane number, while the value of an entry
    113                  indicates physical lane index. Lane swapping
    114                  is supported. Physical lane indexes are;
    115                  0, 1, 2, 3
    116                minItems: 1
    117                maxItems: 4
    118
    119            required:
    120              - data-lanes
    121
    122      port@1:
    123        $ref: /schemas/graph.yaml#/$defs/port-base
    124        unevaluatedProperties: false
    125        description:
    126          Input port for receiving CSI data.
    127
    128        properties:
    129          endpoint:
    130            $ref: video-interfaces.yaml#
    131            unevaluatedProperties: false
    132
    133            properties:
    134              data-lanes:
    135                minItems: 1
    136                maxItems: 4
    137
    138            required:
    139              - data-lanes
    140
    141      port@2:
    142        $ref: /schemas/graph.yaml#/$defs/port-base
    143        unevaluatedProperties: false
    144        description:
    145          Input port for receiving CSI data.
    146
    147        properties:
    148          endpoint:
    149            $ref: video-interfaces.yaml#
    150            unevaluatedProperties: false
    151
    152            properties:
    153              data-lanes:
    154                minItems: 1
    155                maxItems: 4
    156
    157            required:
    158              - data-lanes
    159
    160      port@3:
    161        $ref: /schemas/graph.yaml#/$defs/port-base
    162        unevaluatedProperties: false
    163        description:
    164          Input port for receiving CSI data.
    165
    166        properties:
    167          endpoint:
    168            $ref: video-interfaces.yaml#
    169            unevaluatedProperties: false
    170
    171            properties:
    172              data-lanes:
    173                minItems: 1
    174                maxItems: 4
    175
    176            required:
    177              - data-lanes
    178
    179  reg:
    180    minItems: 14
    181    maxItems: 14
    182
    183  reg-names:
    184    items:
    185      - const: csiphy0
    186      - const: csiphy0_clk_mux
    187      - const: csiphy1
    188      - const: csiphy1_clk_mux
    189      - const: csiphy2
    190      - const: csiphy2_clk_mux
    191      - const: csid0
    192      - const: csid1
    193      - const: csid2
    194      - const: csid3
    195      - const: ispif
    196      - const: csi_clk_mux
    197      - const: vfe0
    198      - const: vfe1
    199
    200  vdda-supply:
    201    description:
    202      Definition of the regulator used as analog power supply.
    203
    204required:
    205  - clock-names
    206  - clocks
    207  - compatible
    208  - interrupt-names
    209  - interrupts
    210  - iommus
    211  - power-domains
    212  - reg
    213  - reg-names
    214  - vdda-supply
    215
    216additionalProperties: false
    217
    218examples:
    219  - |
    220    #include <dt-bindings/interrupt-controller/arm-gic.h>
    221    #include <dt-bindings/clock/qcom,gcc-msm8996.h>
    222    #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
    223
    224    camss: camss@a00000 {
    225      compatible = "qcom,msm8996-camss";
    226
    227      clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
    228        <&mmcc CAMSS_ISPIF_AHB_CLK>,
    229        <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
    230        <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
    231        <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
    232        <&mmcc CAMSS_CSI0_AHB_CLK>,
    233        <&mmcc CAMSS_CSI0_CLK>,
    234        <&mmcc CAMSS_CSI0PHY_CLK>,
    235        <&mmcc CAMSS_CSI0PIX_CLK>,
    236        <&mmcc CAMSS_CSI0RDI_CLK>,
    237        <&mmcc CAMSS_CSI1_AHB_CLK>,
    238        <&mmcc CAMSS_CSI1_CLK>,
    239        <&mmcc CAMSS_CSI1PHY_CLK>,
    240        <&mmcc CAMSS_CSI1PIX_CLK>,
    241        <&mmcc CAMSS_CSI1RDI_CLK>,
    242        <&mmcc CAMSS_CSI2_AHB_CLK>,
    243        <&mmcc CAMSS_CSI2_CLK>,
    244        <&mmcc CAMSS_CSI2PHY_CLK>,
    245        <&mmcc CAMSS_CSI2PIX_CLK>,
    246        <&mmcc CAMSS_CSI2RDI_CLK>,
    247        <&mmcc CAMSS_CSI3_AHB_CLK>,
    248        <&mmcc CAMSS_CSI3_CLK>,
    249        <&mmcc CAMSS_CSI3PHY_CLK>,
    250        <&mmcc CAMSS_CSI3PIX_CLK>,
    251        <&mmcc CAMSS_CSI3RDI_CLK>,
    252        <&mmcc CAMSS_AHB_CLK>,
    253        <&mmcc CAMSS_VFE0_CLK>,
    254        <&mmcc CAMSS_CSI_VFE0_CLK>,
    255        <&mmcc CAMSS_VFE0_AHB_CLK>,
    256        <&mmcc CAMSS_VFE0_STREAM_CLK>,
    257        <&mmcc CAMSS_VFE1_CLK>,
    258        <&mmcc CAMSS_CSI_VFE1_CLK>,
    259        <&mmcc CAMSS_VFE1_AHB_CLK>,
    260        <&mmcc CAMSS_VFE1_STREAM_CLK>,
    261        <&mmcc CAMSS_VFE_AHB_CLK>,
    262        <&mmcc CAMSS_VFE_AXI_CLK>;
    263
    264      clock-names = "top_ahb",
    265        "ispif_ahb",
    266        "csiphy0_timer",
    267        "csiphy1_timer",
    268        "csiphy2_timer",
    269        "csi0_ahb",
    270        "csi0",
    271        "csi0_phy",
    272        "csi0_pix",
    273        "csi0_rdi",
    274        "csi1_ahb",
    275        "csi1",
    276        "csi1_phy",
    277        "csi1_pix",
    278        "csi1_rdi",
    279        "csi2_ahb",
    280        "csi2",
    281        "csi2_phy",
    282        "csi2_pix",
    283        "csi2_rdi",
    284        "csi3_ahb",
    285        "csi3",
    286        "csi3_phy",
    287        "csi3_pix",
    288        "csi3_rdi",
    289        "ahb",
    290        "vfe0",
    291        "csi_vfe0",
    292        "vfe0_ahb",
    293        "vfe0_stream",
    294        "vfe1",
    295        "csi_vfe1",
    296        "vfe1_ahb",
    297        "vfe1_stream",
    298        "vfe_ahb",
    299        "vfe_axi";
    300
    301      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
    302        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
    303        <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
    304        <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
    305        <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
    306        <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
    307        <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
    308        <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
    309        <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
    310        <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
    311
    312      interrupt-names = "csiphy0",
    313        "csiphy1",
    314        "csiphy2",
    315        "csid0",
    316        "csid1",
    317        "csid2",
    318        "csid3",
    319        "ispif",
    320        "vfe0",
    321        "vfe1";
    322
    323      iommus = <&vfe_smmu 0>,
    324         <&vfe_smmu 1>,
    325         <&vfe_smmu 2>,
    326         <&vfe_smmu 3>;
    327
    328      power-domains = <&mmcc VFE0_GDSC>,
    329        <&mmcc VFE1_GDSC>;
    330
    331      reg = <0x00a34000 0x1000>,
    332        <0x00a00030 0x4>,
    333        <0x00a35000 0x1000>,
    334        <0x00a00038 0x4>,
    335        <0x00a36000 0x1000>,
    336        <0x00a00040 0x4>,
    337        <0x00a30000 0x100>,
    338        <0x00a30400 0x100>,
    339        <0x00a30800 0x100>,
    340        <0x00a30c00 0x100>,
    341        <0x00a31000 0x500>,
    342        <0x00a00020 0x10>,
    343        <0x00a10000 0x1000>,
    344        <0x00a14000 0x1000>;
    345
    346      reg-names = "csiphy0",
    347        "csiphy0_clk_mux",
    348        "csiphy1",
    349        "csiphy1_clk_mux",
    350        "csiphy2",
    351        "csiphy2_clk_mux",
    352        "csid0",
    353        "csid1",
    354        "csid2",
    355        "csid3",
    356        "ispif",
    357        "csi_clk_mux",
    358        "vfe0",
    359        "vfe1";
    360
    361      vdda-supply = <&reg_2v8>;
    362
    363      ports {
    364        #address-cells = <1>;
    365        #size-cells = <0>;
    366      };
    367    };