cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,imr.yaml (1693B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/media/renesas,imr.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas R-Car Image Renderer (Distortion Correction Engine)
      8
      9maintainers:
     10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
     11
     12description: |
     13  The image renderer, or the distortion correction engine, is a drawing
     14  processor with a simple instruction system capable of referencing video
     15  capture data or data in an external memory as 2D texture data and performing
     16  texture mapping and drawing with respect to any shape that is split into
     17  triangular objects.
     18
     19  The image renderer light extended 4 (IMR-LX4) is found in R-Car Gen3 SoCs.
     20
     21properties:
     22  compatible:
     23    items:
     24      - enum:
     25          - renesas,r8a7795-imr-lx4 # R-Car H3
     26          - renesas,r8a7796-imr-lx4 # R-Car M3-W
     27      - const: renesas,imr-lx4      # R-Car Gen3
     28
     29  reg:
     30    maxItems: 1
     31
     32  interrupts:
     33    maxItems: 1
     34
     35  clocks:
     36    maxItems: 1
     37
     38  power-domains:
     39    maxItems: 1
     40
     41  resets:
     42    maxItems: 1
     43
     44required:
     45  - compatible
     46  - reg
     47  - interrupts
     48  - clocks
     49  - power-domains
     50  - resets
     51
     52additionalProperties: false
     53
     54examples:
     55  - |
     56    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
     57    #include <dt-bindings/interrupt-controller/arm-gic.h>
     58    #include <dt-bindings/power/r8a7795-sysc.h>
     59
     60    imr-lx4@fe860000 {
     61            compatible = "renesas,r8a7795-imr-lx4", "renesas,imr-lx4";
     62            reg = <0xfe860000 0x2000>;
     63            interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
     64            clocks = <&cpg CPG_MOD 823>;
     65            power-domains = <&sysc R8A7795_PD_A3VC>;
     66            resets = <&cpg 823>;
     67    };