cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rockchip-rga.yaml (1860B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/media/rockchip-rga.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Rockchip 2D raster graphic acceleration controller (RGA)
      8
      9description:
     10  RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
     11  graphics operations, such as point/line drawing, image scaling, rotation,
     12  BitBLT, alpha blending and image blur/sharpness.
     13
     14maintainers:
     15  - Jacob Chen <jacob-chen@iotwrt.com>
     16  - Ezequiel Garcia <ezequiel@collabora.com>
     17
     18properties:
     19  compatible:
     20    oneOf:
     21      - const: rockchip,rk3288-rga
     22      - const: rockchip,rk3399-rga
     23      - items:
     24          - const: rockchip,rk3228-rga
     25          - const: rockchip,rk3288-rga
     26
     27  reg:
     28    maxItems: 1
     29
     30  interrupts:
     31    maxItems: 1
     32
     33  clocks:
     34    maxItems: 3
     35
     36  clock-names:
     37    items:
     38      - const: aclk
     39      - const: hclk
     40      - const: sclk
     41
     42  power-domains:
     43    maxItems: 1
     44
     45  resets:
     46    maxItems: 3
     47
     48  reset-names:
     49    items:
     50      - const: core
     51      - const: axi
     52      - const: ahb
     53
     54required:
     55  - compatible
     56  - reg
     57  - interrupts
     58  - clocks
     59  - clock-names
     60  - resets
     61  - reset-names
     62
     63additionalProperties: false
     64
     65examples:
     66  - |
     67    #include <dt-bindings/clock/rk3399-cru.h>
     68    #include <dt-bindings/interrupt-controller/arm-gic.h>
     69    #include <dt-bindings/power/rk3399-power.h>
     70    rga: rga@ff680000 {
     71      compatible = "rockchip,rk3399-rga";
     72      reg = <0xff680000 0x10000>;
     73      interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
     74      clocks = <&cru ACLK_RGA>,
     75               <&cru HCLK_RGA>,
     76               <&cru SCLK_RGA_CORE>;
     77      clock-names = "aclk", "hclk", "sclk";
     78      power-domains = <&power RK3399_PD_RGA>;
     79      resets = <&cru SRST_RGA_CORE>,
     80               <&cru SRST_A_RGA>,
     81               <&cru SRST_H_RGA>;
     82      reset-names = "core", "axi", "ahb";
     83    };