cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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baikal,bt1-l2-ctl.yaml (1614B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/memory-controllers/baikal,bt1-l2-ctl.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Baikal-T1 L2-cache Control Block
      9
     10maintainers:
     11  - Serge Semin <fancer.lancer@gmail.com>
     12
     13description: |
     14  By means of the System Controller Baikal-T1 SoC exposes a few settings to
     15  tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible
     16  to change the Tag, Data and Way-select RAM access latencies. Baikal-T1
     17  L2-cache controller block is responsible for the tuning. Its DT node is
     18  supposed to be a child of the system controller.
     19
     20properties:
     21  compatible:
     22    const: baikal,bt1-l2-ctl
     23
     24  reg:
     25    maxItems: 1
     26
     27  baikal,l2-ws-latency:
     28    $ref: /schemas/types.yaml#/definitions/uint32
     29    description: Cycles of latency for Way-select RAM accesses
     30    default: 0
     31    minimum: 0
     32    maximum: 3
     33
     34  baikal,l2-tag-latency:
     35    $ref: /schemas/types.yaml#/definitions/uint32
     36    description: Cycles of latency for Tag RAM accesses
     37    default: 0
     38    minimum: 0
     39    maximum: 3
     40
     41  baikal,l2-data-latency:
     42    $ref: /schemas/types.yaml#/definitions/uint32
     43    description: Cycles of latency for Data RAM accesses
     44    default: 1
     45    minimum: 0
     46    maximum: 3
     47
     48additionalProperties: false
     49
     50required:
     51  - compatible
     52
     53examples:
     54  - |
     55    l2@1f04d028 {
     56      compatible = "baikal,bt1-l2-ctl";
     57      reg = <0x1f04d028 0x004>;
     58
     59      baikal,l2-ws-latency = <1>;
     60      baikal,l2-tag-latency = <1>;
     61      baikal,l2-data-latency = <2>;
     62    };
     63...