cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,ifc.yaml (3210B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: FSL/NXP Integrated Flash Controller
      8
      9maintainers:
     10  - Li Yang <leoyang.li@nxp.com>
     11
     12description: |
     13  NXP's integrated flash controller (IFC) is an advanced version of the
     14  enhanced local bus controller which includes similar programming and signal
     15  interfaces with an extended feature set. The IFC provides access to multiple
     16  external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM,
     17  SRAM and other memories where address and data are shared on a bus.
     18
     19properties:
     20  $nodename:
     21    pattern: "^memory-controller@[0-9a-f]+$"
     22
     23  compatible:
     24    const: fsl,ifc
     25
     26  "#address-cells":
     27    enum: [2, 3]
     28    description: |
     29      Should be either two or three.  The first cell is the chipselect
     30      number, and the remaining cells are the offset into the chipselect.
     31
     32  "#size-cells":
     33    enum: [1, 2]
     34    description: |
     35      Either one or two, depending on how large each chipselect can be.
     36
     37  reg:
     38    maxItems: 1
     39
     40  interrupts:
     41    minItems: 1
     42    maxItems: 2
     43    description: |
     44      IFC may have one or two interrupts.  If two interrupt specifiers are
     45      present, the first is the "common" interrupt (CM_EVTER_STAT), and the
     46      second is the NAND interrupt (NAND_EVTER_STAT).  If there is only one,
     47      that interrupt reports both types of event.
     48
     49  little-endian:
     50    type: boolean
     51    description: |
     52      If this property is absent, the big-endian mode will be in use as default
     53      for registers.
     54
     55  ranges:
     56    description: |
     57      Each range corresponds to a single chipselect, and covers the entire
     58      access window as configured.
     59
     60patternProperties:
     61  "^.*@[a-f0-9]+(,[a-f0-9]+)+$":
     62    type: object
     63    description: |
     64      Child device nodes describe the devices connected to IFC such as NOR (e.g.
     65      cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
     66      like FPGAs, CPLDs, etc.
     67
     68    required:
     69      - compatible
     70      - reg
     71
     72required:
     73  - compatible
     74  - reg
     75  - interrupts
     76
     77additionalProperties: false
     78
     79examples:
     80  - |
     81    soc {
     82        #address-cells = <2>;
     83        #size-cells = <2>;
     84
     85        memory-controller@ffe1e000 {
     86            compatible = "fsl,ifc";
     87            #address-cells = <2>;
     88            #size-cells = <1>;
     89            reg = <0x0 0xffe1e000 0 0x2000>;
     90            interrupts = <16 2 19 2>;
     91            little-endian;
     92
     93            /* NOR, NAND Flashes and CPLD on board */
     94            ranges = <0x0 0x0 0x0 0xee000000 0x02000000>,
     95                     <0x1 0x0 0x0 0xffa00000 0x00010000>,
     96                     <0x3 0x0 0x0 0xffb00000 0x00020000>;
     97
     98            flash@0,0 {
     99                #address-cells = <1>;
    100                #size-cells = <1>;
    101                compatible = "cfi-flash";
    102                reg = <0x0 0x0 0x2000000>;
    103                bank-width = <2>;
    104                device-width = <1>;
    105
    106                partition@0 {
    107                    /* 32MB for user data */
    108                    reg = <0x0 0x02000000>;
    109                    label = "NOR Data";
    110                };
    111            };
    112        };
    113    };