cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mmdc.yaml (1086B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale Multi Mode DDR controller (MMDC)
      8
      9maintainers:
     10  - Anson Huang <Anson.Huang@nxp.com>
     11
     12properties:
     13  compatible:
     14    oneOf:
     15      - const: fsl,imx6q-mmdc
     16      - items:
     17          - enum:
     18              - fsl,imx6qp-mmdc
     19              - fsl,imx6sl-mmdc
     20              - fsl,imx6sll-mmdc
     21              - fsl,imx6sx-mmdc
     22              - fsl,imx6ul-mmdc
     23              - fsl,imx7ulp-mmdc
     24          - const: fsl,imx6q-mmdc
     25
     26  reg:
     27    maxItems: 1
     28
     29  clocks:
     30    maxItems: 1
     31
     32required:
     33  - compatible
     34  - reg
     35
     36additionalProperties: false
     37
     38examples:
     39  - |
     40    #include <dt-bindings/clock/imx6qdl-clock.h>
     41
     42    memory-controller@21b0000 {
     43        compatible = "fsl,imx6q-mmdc";
     44        reg = <0x021b0000 0x4000>;
     45        clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
     46    };
     47
     48    memory-controller@21b4000 {
     49        compatible = "fsl,imx6q-mmdc";
     50        reg = <0x021b4000 0x4000>;
     51    };