cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mediatek,smi-larb.yaml (3318B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright (c) 2020 MediaTek Inc.
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: SMI (Smart Multimedia Interface) Local Arbiter
      9
     10maintainers:
     11  - Yong Wu <yong.wu@mediatek.com>
     12
     13description: |
     14  The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
     15
     16properties:
     17  compatible:
     18    oneOf:
     19      - enum:
     20          - mediatek,mt2701-smi-larb
     21          - mediatek,mt2712-smi-larb
     22          - mediatek,mt6779-smi-larb
     23          - mediatek,mt8167-smi-larb
     24          - mediatek,mt8173-smi-larb
     25          - mediatek,mt8183-smi-larb
     26          - mediatek,mt8186-smi-larb
     27          - mediatek,mt8192-smi-larb
     28          - mediatek,mt8195-smi-larb
     29
     30      - description: for mt7623
     31        items:
     32          - const: mediatek,mt7623-smi-larb
     33          - const: mediatek,mt2701-smi-larb
     34
     35  reg:
     36    maxItems: 1
     37
     38  clocks:
     39    description: |
     40      apb and smi are mandatory. gals(global async local sync) is optional.
     41    minItems: 2
     42    items:
     43      - description: apb is Advanced Peripheral Bus clock, It's the clock for
     44          setting the register.
     45      - description: smi is the clock for transfer data and command.
     46      - description: the clock for gals.
     47
     48  clock-names:
     49    minItems: 2
     50    maxItems: 3
     51
     52  power-domains:
     53    maxItems: 1
     54
     55  mediatek,smi:
     56    $ref: /schemas/types.yaml#/definitions/phandle
     57    description: a phandle to the smi_common node.
     58
     59  mediatek,larb-id:
     60    $ref: /schemas/types.yaml#/definitions/uint32
     61    minimum: 0
     62    maximum: 31
     63    description: the hardware id of this larb. It's only required when this
     64      hardward id is not consecutive from its M4U point of view.
     65
     66required:
     67  - compatible
     68  - reg
     69  - clocks
     70  - clock-names
     71  - power-domains
     72
     73allOf:
     74  - if:  # HW has gals
     75      properties:
     76        compatible:
     77          enum:
     78            - mediatek,mt8183-smi-larb
     79            - mediatek,mt8186-smi-larb
     80            - mediatek,mt8195-smi-larb
     81
     82    then:
     83      properties:
     84        clocks:
     85          minItems: 2
     86          maxItems: 3
     87        clock-names:
     88          minItems: 2
     89          items:
     90            - const: apb
     91            - const: smi
     92            - const: gals
     93
     94    else:
     95      properties:
     96        clocks:
     97          minItems: 2
     98          maxItems: 2
     99        clock-names:
    100          items:
    101            - const: apb
    102            - const: smi
    103
    104  - if:
    105      properties:
    106        compatible:
    107          contains:
    108            enum:
    109              - mediatek,mt2701-smi-larb
    110              - mediatek,mt2712-smi-larb
    111              - mediatek,mt6779-smi-larb
    112              - mediatek,mt8186-smi-larb
    113              - mediatek,mt8192-smi-larb
    114              - mediatek,mt8195-smi-larb
    115
    116    then:
    117      required:
    118        - mediatek,larb-id
    119
    120additionalProperties: false
    121
    122examples:
    123  - |+
    124    #include <dt-bindings/clock/mt8173-clk.h>
    125    #include <dt-bindings/power/mt8173-power.h>
    126
    127    larb1: larb@16010000 {
    128      compatible = "mediatek,mt8173-smi-larb";
    129      reg = <0x16010000 0x1000>;
    130      mediatek,smi = <&smi_common>;
    131      power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
    132      clocks = <&vdecsys CLK_VDEC_CKEN>,
    133               <&vdecsys CLK_VDEC_LARB_CKEN>;
    134      clock-names = "apb", "smi";
    135    };