cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

altera-a10sr.txt (1754B)


      1* Altera Arria10 Development Kit System Resource Chip
      2
      3Required parent device properties:
      4- compatible		: "altr,a10sr"
      5- spi-max-frequency	: Maximum SPI frequency.
      6- reg			: The SPI Chip Select address for the Arria10
      7			  System Resource chip
      8- interrupts		: The interrupt line the device is connected to.
      9- interrupt-controller	: Marks the device node as an interrupt controller.
     10- #interrupt-cells	: The number of cells to describe an IRQ, should be 2.
     11			    The first cell is the IRQ number.
     12			    The second cell is the flags, encoded as trigger
     13			    masks from ../interrupt-controller/interrupts.txt.
     14
     15The A10SR consists of these sub-devices:
     16
     17Device                   Description
     18------                   ----------
     19a10sr_gpio               GPIO Controller
     20a10sr_rst                Reset Controller
     21
     22Arria10 GPIO
     23Required Properties:
     24- compatible        : Should be "altr,a10sr-gpio"
     25- gpio-controller   : Marks the device node as a GPIO Controller.
     26- #gpio-cells       : Should be two.  The first cell is the pin number and
     27                      the second cell is used to specify flags.
     28                      See ../gpio/gpio.txt for more information.
     29
     30Arria10 Peripheral PHY Reset
     31Required Properties:
     32- compatible        : Should be "altr,a10sr-reset"
     33- #reset-cells      : Should be one.
     34
     35Example:
     36
     37        resource-manager@0 {
     38		compatible = "altr,a10sr";
     39		reg = <0>;
     40		spi-max-frequency = <100000>;
     41		interrupt-parent = <&portb>;
     42		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
     43		interrupt-controller;
     44		#interrupt-cells = <2>;
     45
     46		a10sr_gpio: gpio-controller {
     47			compatible = "altr,a10sr-gpio";
     48			gpio-controller;
     49			#gpio-cells = <2>;
     50		};
     51
     52		a10sr_rst: reset-controller {
     53			compatible = "altr,a10sr-reset";
     54			#reset-cells = <1>;
     55		};
     56	};