cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed-scu.txt (1313B)


      1The Aspeed System Control Unit manages the global behaviour of the SoC,
      2configuring elements such as clocks, pinmux, and reset.
      3
      4Required properties:
      5- compatible:	One of:
      6		"aspeed,ast2400-scu", "syscon", "simple-mfd"
      7		"aspeed,ast2500-scu", "syscon", "simple-mfd"
      8
      9- reg:		contains the offset and length of the SCU memory region
     10- #clock-cells: should be set to <1> - the system controller is also a
     11	clock provider
     12- #reset-cells: should be set to <1> - the system controller is also a
     13	reset line provider
     14
     15Example:
     16
     17syscon: syscon@1e6e2000 {
     18	compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
     19	reg = <0x1e6e2000 0x1a8>;
     20	#clock-cells = <1>;
     21	#reset-cells = <1>;
     22};
     23
     24Silicon ID
     25-----------------
     26
     27Families have unique hardware silicon identifiers within the SoC.
     28
     29Required properties:
     30
     31 - compatible:		"aspeed,silicon-id" or:
     32			"aspeed,ast2400-silicon-id" or
     33			"aspeed,ast2500-silicon-id" or
     34			"aspeed,ast2600-silicon-id"
     35
     36 - reg:			offset and length of the silicon id information
     37			optionally, a second offset and length describes the unique chip id
     38
     39			The reg should be the unique silicon id register, and
     40			not backwards compatible one in eg. the 2600.
     41
     42Example:
     43
     44
     45silicon-id@7c {
     46        compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
     47        reg = <0x7c 0x4 0x150 0x8>;
     48};