cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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atmel-flexcom.txt (1810B)


      1* Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit)
      2
      3The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C
      4controller and an USART. Only one function can be used at a time and is chosen
      5at boot time according to the device tree.
      6
      7Required properties:
      8- compatible:		Should be "atmel,sama5d2-flexcom"
      9- reg:			Should be the offset/length value for Flexcom dedicated
     10			I/O registers (without USART, TWI or SPI registers).
     11- clocks:		Should be the Flexcom peripheral clock from PMC.
     12- #address-cells:	Should be <1>
     13- #size-cells:		Should be <1>
     14- ranges:		Should be one range for the full I/O register region
     15			(including USART, TWI and SPI registers).
     16- atmel,flexcom-mode:	Should be one of the following values:
     17			- <1> for USART
     18			- <2> for SPI
     19			- <3> for I2C
     20
     21Required child:
     22A single available child device of type matching the "atmel,flexcom-mode"
     23property.
     24
     25The phandle provided by the clocks property of the child is the same as one for
     26the Flexcom parent.
     27
     28For other properties, please refer to the documentations of the respective
     29device:
     30- ../serial/atmel-usart.txt
     31- ../spi/spi_atmel.txt
     32- ../i2c/i2c-at91.txt
     33
     34Example:
     35
     36flexcom@f8034000 {
     37	compatible = "atmel,sama5d2-flexcom";
     38	reg = <0xf8034000 0x200>;
     39	clocks = <&flx0_clk>;
     40	#address-cells = <1>;
     41	#size-cells = <1>;
     42	ranges = <0x0 0xf8034000 0x800>;
     43	atmel,flexcom-mode = <2>;
     44
     45	spi@400 {
     46		compatible = "atmel,at91rm9200-spi";
     47		reg = <0x400 0x200>;
     48		interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
     49		pinctrl-names = "default";
     50		pinctrl-0 = <&pinctrl_flx0_default>;
     51		#address-cells = <1>;
     52		#size-cells = <0>;
     53		clocks = <&flx0_clk>;
     54		clock-names = "spi_clk";
     55		atmel,fifo-size = <32>;
     56
     57		flash@0 {
     58			compatible = "atmel,at25f512b";
     59			reg = <0>;
     60			spi-max-frequency = <20000000>;
     61		};
     62	};
     63};