cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ingenic,cpu.yaml (1450B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Bindings for Ingenic XBurst family CPUs
      8
      9maintainers:
     10  - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
     11
     12description:
     13  Ingenic XBurst family CPUs shall have the following properties.
     14
     15properties:
     16  compatible:
     17    oneOf:
     18
     19      - description: Ingenic XBurst®1 CPU Cores
     20        enum:
     21          - ingenic,xburst-mxu1.0
     22          - ingenic,xburst-fpu1.0-mxu1.1
     23          - ingenic,xburst-fpu2.0-mxu2.0
     24
     25      - description: Ingenic XBurst®2 CPU Cores
     26        enum:
     27          - ingenic,xburst2-fpu2.1-mxu2.1-smt
     28
     29  reg:
     30    maxItems: 1
     31
     32  clocks:
     33    maxItems: 1
     34
     35  device_type: true
     36
     37required:
     38  - device_type
     39  - compatible
     40  - reg
     41  - clocks
     42
     43additionalProperties: false
     44
     45examples:
     46  - |
     47    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
     48
     49    cpus {
     50        #address-cells = <1>;
     51        #size-cells = <0>;
     52
     53        cpu0: cpu@0 {
     54                device_type = "cpu";
     55                compatible = "ingenic,xburst-fpu1.0-mxu1.1";
     56                reg = <0>;
     57
     58                clocks = <&cgu JZ4780_CLK_CPU>;
     59        };
     60
     61        cpu1: cpu@1 {
     62                device_type = "cpu";
     63                compatible = "ingenic,xburst-fpu1.0-mxu1.1";
     64                reg = <1>;
     65
     66                clocks = <&cgu JZ4780_CLK_CORE1>;
     67        };
     68    };
     69...