cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed-p2a-ctrl.txt (1439B)


      1======================================================================
      2Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver
      3======================================================================
      4
      5The bridge is available on platforms with the VGA enabled on the Aspeed device.
      6In this case, the host has access to a 64KiB window into all of the BMC's
      7memory.  The BMC can disable this bridge.  If the bridge is enabled, the host
      8has read access to all the regions of memory, however the host only has read
      9and write access depending on a register controlled by the BMC.
     10
     11Required properties:
     12===================
     13
     14 - compatible: must be one of:
     15	- "aspeed,ast2400-p2a-ctrl"
     16	- "aspeed,ast2500-p2a-ctrl"
     17
     18Optional properties:
     19===================
     20
     21- reg: A hint for the memory regions associated with the P2A controller
     22- memory-region: A phandle to a reserved_memory region to be used for the PCI
     23		to AHB mapping
     24
     25The p2a-control node should be the child of a syscon node with the required
     26property:
     27
     28- compatible : Should be one of the following:
     29		"aspeed,ast2400-scu", "syscon", "simple-mfd"
     30		"aspeed,ast2500-scu", "syscon", "simple-mfd"
     31
     32Example
     33===================
     34
     35g4 Example
     36----------
     37
     38syscon: scu@1e6e2000 {
     39	compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
     40	reg = <0x1e6e2000 0x1a8>;
     41
     42	p2a: p2a-control {
     43		compatible = "aspeed,ast2400-p2a-ctrl";
     44		memory-region = <&reserved_memory>;
     45	};
     46};