aspeed,sdhci.yaml (2798B)
1# SPDX-License-Identifier: GPL-2.0-or-later 2# Copyright 2019 IBM Corp. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: ASPEED SD/SDIO/MMC Controller 9 10maintainers: 11 - Andrew Jeffery <andrew@aj.id.au> 12 - Ryan Chen <ryanchen.aspeed@gmail.com> 13 14description: |+ 15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO 16 Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if 17 only a single slot is enabled. 18 19 The two slots are supported by a common configuration area. As the SDHCIs for 20 the slots are dependent on the common configuration area, they are described 21 as child nodes. 22 23properties: 24 compatible: 25 enum: 26 - aspeed,ast2400-sd-controller 27 - aspeed,ast2500-sd-controller 28 - aspeed,ast2600-sd-controller 29 reg: 30 maxItems: 1 31 description: Common configuration registers 32 "#address-cells": 33 const: 1 34 "#size-cells": 35 const: 1 36 ranges: true 37 clocks: 38 maxItems: 1 39 description: The SD/SDIO controller clock gate 40 41patternProperties: 42 "^sdhci@[0-9a-f]+$": 43 type: object 44 $ref: mmc-controller.yaml 45 46 properties: 47 compatible: 48 enum: 49 - aspeed,ast2400-sdhci 50 - aspeed,ast2500-sdhci 51 - aspeed,ast2600-sdhci 52 reg: 53 maxItems: 1 54 description: The SDHCI registers 55 clocks: 56 maxItems: 1 57 description: The SD bus clock 58 interrupts: 59 maxItems: 1 60 description: The SD interrupt shared between both slots 61 sdhci,auto-cmd12: 62 type: boolean 63 description: Specifies that controller should use auto CMD12 64 required: 65 - compatible 66 - reg 67 - clocks 68 - interrupts 69 70additionalProperties: false 71 72required: 73 - compatible 74 - reg 75 - "#address-cells" 76 - "#size-cells" 77 - ranges 78 - clocks 79 80examples: 81 - | 82 #include <dt-bindings/clock/aspeed-clock.h> 83 sdc@1e740000 { 84 compatible = "aspeed,ast2500-sd-controller"; 85 reg = <0x1e740000 0x100>; 86 #address-cells = <1>; 87 #size-cells = <1>; 88 ranges = <0 0x1e740000 0x20000>; 89 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 90 91 sdhci0: sdhci@100 { 92 compatible = "aspeed,ast2500-sdhci"; 93 reg = <0x100 0x100>; 94 interrupts = <26>; 95 sdhci,auto-cmd12; 96 clocks = <&syscon ASPEED_CLK_SDIO>; 97 }; 98 99 sdhci1: sdhci@200 { 100 compatible = "aspeed,ast2500-sdhci"; 101 reg = <0x200 0x100>; 102 interrupts = <26>; 103 sdhci,auto-cmd12; 104 clocks = <&syscon ASPEED_CLK_SDIO>; 105 }; 106 };