cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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davinci_mmc.txt (1006B)


      1* TI Highspeed MMC host controller for DaVinci
      2
      3The Highspeed MMC Host Controller on TI DaVinci family
      4provides an interface for MMC, SD and SDIO types of memory cards.
      5
      6This file documents the properties used by the davinci_mmc driver.
      7
      8Required properties:
      9- compatible:
     10 Should be "ti,da830-mmc": for da830, da850, dm365
     11 Should be "ti,dm355-mmc": for dm355, dm644x
     12
     13Optional properties:
     14- bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
     15- max-frequency: Maximum operating clock frequency, default 25MHz.
     16- dmas: List of DMA specifiers with the controller specific format
     17	as described in the generic DMA client binding. A tx and rx
     18	specifier is required.
     19- dma-names: RX and TX  DMA request names. These strings correspond
     20	1:1 with the DMA specifiers listed in dmas.
     21
     22Example:
     23mmc0: mmc@1c40000 {
     24	compatible = "ti,da830-mmc",
     25	reg = <0x40000 0x1000>;
     26	interrupts = <16>;
     27	bus-width = <4>;
     28	max-frequency = <50000000>;
     29	dmas = <&edma 16
     30		&edma 17>;
     31	dma-names = "rx", "tx";
     32};