cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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microchip,sdhci-pic32.txt (1057B)


      1* Microchip PIC32 SDHCI Controller
      2
      3This file documents differences between the core properties in mmc.txt
      4and the properties used by the sdhci-pic32 driver.
      5
      6Required properties:
      7- compatible: Should be "microchip,pic32mzda-sdhci"
      8- interrupts: Should contain interrupt
      9- clock-names: Should be "base_clk", "sys_clk".
     10               See: Documentation/devicetree/bindings/resource-names.txt
     11- clocks: Phandle to the clock.
     12          See: Documentation/devicetree/bindings/clock/clock-bindings.txt
     13- pinctrl-names: A pinctrl state names "default" must be defined.
     14- pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
     15             See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
     16
     17Example:
     18
     19	sdhci@1f8ec000 {
     20		compatible = "microchip,pic32mzda-sdhci";
     21		reg = <0x1f8ec000 0x100>;
     22		interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
     23		clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>;
     24		clock-names = "base_clk", "sys_clk";
     25		bus-width = <4>;
     26		cap-sd-highspeed;
     27		pinctrl-names = "default";
     28		pinctrl-0 = <&pinctrl_sdhc1>;
     29	};