cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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moxa,moxart-mmc.txt (740B)

      1MOXA ART MMC Host Controller Interface
      2
      3  Inherits from mmc binding[1].
      4
      5  [1] Documentation/devicetree/bindings/mmc/mmc.txt
      6
      7Required properties:
      8
      9- compatible :	Must be "moxa,moxart-mmc" or "faraday,ftsdc010"
     10- reg :		Should contain registers location and length
     11- interrupts :	Should contain the interrupt number
     12- clocks :	Should contain phandle for the clock feeding the MMC controller
     13
     14Optional properties:
     15
     16- dmas :	Should contain two DMA channels, line request number must be 5 for
     17		both channels
     18- dma-names :	Must be "tx", "rx"
     19
     20Example:
     21
     22	mmc: mmc@98e00000 {
     23		compatible = "moxa,moxart-mmc";
     24		reg = <0x98e00000 0x5C>;
     25		interrupts = <5 0>;
     26		clocks = <&clk_apb>;
     27		dmas =  <&dma 5>,
     28			<&dma 5>;
     29		dma-names = "tx", "rx";
     30	};