cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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samsung,s3cmci.txt (1484B)

      1* Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings
      2
      3Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface
      4with external MMC, SD and SDIO storage mediums.
      5
      6This file documents differences between the core mmc properties described by
      7mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
      8implementation.
      9
     10Required SoC Specific Properties:
     11- compatible: should be one of the following
     12  - "samsung,s3c2410-sdi": for controllers compatible with s3c2410
     13  - "samsung,s3c2412-sdi": for controllers compatible with s3c2412
     14  - "samsung,s3c2440-sdi": for controllers compatible with s3c2440
     15- reg: register location and length
     16- interrupts: mmc controller interrupt
     17- clocks: Should reference the controller clock
     18- clock-names: Should contain "sdi"
     19
     20Required Board Specific Properties:
     21- pinctrl-0: Should specify pin control groups used for this controller.
     22- pinctrl-names: Should contain only one value - "default".
     23
     24Optional Properties:
     25- bus-width: number of data lines (see mmc.txt)
     26- cd-gpios: gpio for card detection (see mmc.txt)
     27- wp-gpios: gpio for write protection (see mmc.txt)
     28
     29Example:
     30
     31	mmc0: mmc@5a000000 {
     32		compatible = "samsung,s3c2440-sdi";
     33		pinctrl-names = "default";
     34		pinctrl-0 = <&sdi_pins>;
     35		reg = <0x5a000000 0x100000>;
     36		interrupts = <0 0 21 3>;
     37		clocks = <&clocks PCLK_SDI>;
     38		clock-names = "sdi";
     39		bus-width = <4>;
     40		cd-gpios = <&gpg 8 GPIO_ACTIVE_LOW>;
     41		wp-gpios = <&gph 8 GPIO_ACTIVE_LOW>;
     42	};