cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sdhci-pxa.yaml (2034B)

      1# SPDX-License-Identifier: GPL-2.0-only
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Marvell PXA SDHCI v2/v3 bindings
      8
      9maintainers:
     10  - Ulf Hansson <ulf.hansson@linaro.org>
     11
     12allOf:
     13  - $ref: mmc-controller.yaml#
     14  - if:
     15      properties:
     16        compatible:
     17          contains:
     18            const: marvell,armada-380-sdhci
     19    then:
     20      properties:
     21        regs:
     22          minItems: 3
     23        reg-names:
     24          minItems: 3
     25      required:
     26        - reg-names
     27    else:
     28      properties:
     29        regs:
     30          maxItems: 1
     31        reg-names:
     32          maxItems: 1
     33
     34properties:
     35  compatible:
     36    enum:
     37      - mrvl,pxav2-mmc
     38      - mrvl,pxav3-mmc
     39      - marvell,armada-380-sdhci
     40
     41  reg:
     42    minItems: 1
     43    maxItems: 3
     44
     45  reg-names:
     46    items:
     47      - const: sdhci
     48      - const: mbus
     49      - const: conf-sdio3
     50
     51  interrupts:
     52    maxItems: 1
     53
     54  clocks:
     55    minItems: 1
     56    maxItems: 2
     57
     58  clock-names:
     59    minItems: 1
     60    items:
     61      - const: io
     62      - const: core
     63
     64  mrvl,clk-delay-cycles:
     65    description: Specify a number of cycles to delay for tuning.
     66    $ref: /schemas/types.yaml#/definitions/uint32
     67
     68required:
     69  - compatible
     70  - reg
     71  - interrupts
     72  - clocks
     73  - clock-names
     74
     75unevaluatedProperties: false
     76
     77examples:
     78  - |
     79    #include <dt-bindings/clock/berlin2.h>
     80    mmc@d4280800 {
     81        compatible = "mrvl,pxav3-mmc";
     82        reg = <0xd4280800 0x800>;
     83        bus-width = <8>;
     84        interrupts = <27>;
     85        clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
     86        clock-names = "io", "core";
     87        non-removable;
     88        mrvl,clk-delay-cycles = <31>;
     89    };
     90  - |
     91    mmc@d8000 {
     92        compatible = "marvell,armada-380-sdhci";
     93        reg-names = "sdhci", "mbus", "conf-sdio3";
     94        reg = <0xd8000 0x1000>,
     95              <0xdc000 0x100>,
     96              <0x18454 0x4>;
     97        interrupts = <0 25 0x4>;
     98        clocks = <&gateclk 17>;
     99        clock-names = "io";
    100        mrvl,clk-delay-cycles = <0x1F>;
    101    };
    102
    103...