fsl-upm-nand.txt (1821B)
1Freescale Localbus UPM programmed to work with NAND flash 2 3Required properties: 4- compatible : "fsl,upm-nand". 5- reg : should specify localbus chip select and size used for the chip. 6- fsl,upm-addr-offset : UPM pattern offset for the address latch. 7- fsl,upm-cmd-offset : UPM pattern offset for the command latch. 8 9Optional properties: 10- fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support. 11 The corresponding address lines are used to select the chip. 12- gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins 13 (R/B#). For multi-chip devices, "n" GPIO definitions are required 14 according to the number of chips. 15 16Deprecated properties: 17- fsl,upm-wait-flags : add chip-dependent short delays after running the 18 UPM pattern (0x1), after writing a data byte (0x2) or after 19 writing out a buffer (0x4). 20- chip-delay : chip dependent delay for transferring data from array to 21 read registers (tR). Required if property "gpios" is not used 22 (R/B# pins not connected). 23 24Each flash chip described may optionally contain additional sub-nodes 25describing partitions of the address space. See partition.txt for more 26detail. 27 28Examples: 29 30upm@1,0 { 31 compatible = "fsl,upm-nand"; 32 reg = <1 0 1>; 33 fsl,upm-addr-offset = <16>; 34 fsl,upm-cmd-offset = <8>; 35 gpios = <&qe_pio_e 18 0>; 36 37 flash { 38 #address-cells = <1>; 39 #size-cells = <1>; 40 compatible = "..."; 41 42 partition@0 { 43 ... 44 }; 45 }; 46}; 47 48upm@3,0 { 49 #address-cells = <0>; 50 #size-cells = <0>; 51 compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; 52 reg = <3 0x0 0x800>; 53 fsl,upm-addr-offset = <0x10>; 54 fsl,upm-cmd-offset = <0x08>; 55 /* Multi-chip NAND device */ 56 fsl,upm-addr-line-cs-offsets = <0x0 0x200>; 57 58 nand@0 { 59 #address-cells = <1>; 60 #size-cells = <1>; 61 62 partition@0 { 63 label = "fs"; 64 reg = <0x00000000 0x10000000>; 65 }; 66 }; 67};