cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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oxnas-nand.txt (897B)

      1* Oxford Semiconductor OXNAS NAND Controller
      2
      3Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
      4
      5Required properties:
      6 - compatible: "oxsemi,ox820-nand"
      7 - reg: Base address and length for NAND mapped memory.
      8
      9Optional Properties:
     10 - clocks: phandle to the NAND gate clock if needed.
     11 - resets: phandle to the NAND reset control if needed.
     12
     13Example:
     14
     15nandc: nand-controller@41000000 {
     16	compatible = "oxsemi,ox820-nand";
     17	reg = <0x41000000 0x100000>;
     18	clocks = <&stdclk CLK_820_NAND>;
     19	resets = <&reset RESET_NAND>;
     20	#address-cells = <1>;
     21	#size-cells = <0>;
     22
     23	nand@0 {
     24		reg = <0>;
     25		#address-cells = <1>;
     26		#size-cells = <1>;
     27		nand-ecc-mode = "soft";
     28		nand-ecc-algo = "hamming";
     29
     30		partition@0 {
     31			label = "boot";
     32			reg = <0x00000000 0x00e00000>;
     33			read-only;
     34		};
     35
     36		partition@e00000 {
     37			label = "ubi";
     38			reg = <0x00e00000 0x07200000>;
     39		};
     40	};
     41};