cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,nandc.yaml (4138B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm NAND controller
      8
      9maintainers:
     10  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
     11
     12properties:
     13  compatible:
     14    enum:
     15      - qcom,ipq806x-nand
     16      - qcom,ipq4019-nand
     17      - qcom,ipq6018-nand
     18      - qcom,ipq8074-nand
     19      - qcom,sdx55-nand
     20
     21  reg:
     22    maxItems: 1
     23
     24  clocks:
     25    items:
     26      - description: Core Clock
     27      - description: Always ON Clock
     28
     29  clock-names:
     30    items:
     31      - const: core
     32      - const: aon
     33
     34  "#address-cells": true
     35  "#size-cells": true
     36
     37patternProperties:
     38  "^nand@[a-f0-9]$":
     39    type: object
     40    properties:
     41      nand-bus-width:
     42        const: 8
     43
     44      nand-ecc-strength:
     45        enum: [1, 4, 8]
     46
     47      nand-ecc-step-size:
     48        enum:
     49          - 512
     50
     51allOf:
     52  - $ref: "nand-controller.yaml#"
     53
     54  - if:
     55      properties:
     56        compatible:
     57          contains:
     58            const: qcom,ipq806x-nand
     59    then:
     60      properties:
     61        dmas:
     62          items:
     63            - description: rxtx DMA channel
     64
     65        dma-names:
     66          items:
     67            - const: rxtx
     68
     69        qcom,cmd-crci:
     70          $ref: /schemas/types.yaml#/definitions/uint32
     71          description:
     72            Must contain the ADM command type CRCI block instance number
     73            specified for the NAND controller on the given platform
     74
     75        qcom,data-crci:
     76          $ref: /schemas/types.yaml#/definitions/uint32
     77          description:
     78            Must contain the ADM data type CRCI block instance number
     79            specified for the NAND controller on the given platform
     80
     81  - if:
     82      properties:
     83        compatible:
     84          contains:
     85            enum:
     86              - qcom,ipq4019-nand
     87              - qcom,ipq6018-nand
     88              - qcom,ipq8074-nand
     89              - qcom,sdx55-nand
     90
     91    then:
     92      properties:
     93        dmas:
     94          items:
     95            - description: tx DMA channel
     96            - description: rx DMA channel
     97            - description: cmd DMA channel
     98
     99        dma-names:
    100          items:
    101            - const: tx
    102            - const: rx
    103            - const: cmd
    104
    105required:
    106  - compatible
    107  - reg
    108  - clocks
    109  - clock-names
    110
    111unevaluatedProperties: false
    112
    113examples:
    114  - |
    115    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
    116    nand-controller@1ac00000 {
    117      compatible = "qcom,ipq806x-nand";
    118      reg = <0x1ac00000 0x800>;
    119
    120      clocks = <&gcc EBI2_CLK>,
    121               <&gcc EBI2_AON_CLK>;
    122      clock-names = "core", "aon";
    123
    124      dmas = <&adm_dma 3>;
    125      dma-names = "rxtx";
    126      qcom,cmd-crci = <15>;
    127      qcom,data-crci = <3>;
    128
    129      #address-cells = <1>;
    130      #size-cells = <0>;
    131
    132      nand@0 {
    133        reg = <0>;
    134
    135        nand-ecc-strength = <4>;
    136        nand-bus-width = <8>;
    137
    138        partitions {
    139          compatible = "fixed-partitions";
    140          #address-cells = <1>;
    141          #size-cells = <1>;
    142
    143          partition@0 {
    144            label = "boot-nand";
    145            reg = <0 0x58a0000>;
    146          };
    147
    148          partition@58a0000 {
    149            label = "fs-nand";
    150            reg = <0x58a0000 0x4000000>;
    151          };
    152        };
    153      };
    154    };
    155
    156    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
    157    nand-controller@79b0000 {
    158      compatible = "qcom,ipq4019-nand";
    159      reg = <0x79b0000 0x1000>;
    160
    161      clocks = <&gcc GCC_QPIC_CLK>,
    162               <&gcc GCC_QPIC_AHB_CLK>;
    163      clock-names = "core", "aon";
    164
    165      dmas = <&qpicbam 0>,
    166             <&qpicbam 1>,
    167             <&qpicbam 2>;
    168      dma-names = "tx", "rx", "cmd";
    169
    170      #address-cells = <1>;
    171      #size-cells = <0>;
    172
    173      nand@0 {
    174        reg = <0>;
    175        nand-ecc-strength = <4>;
    176        nand-bus-width = <8>;
    177
    178        partitions {
    179          compatible = "fixed-partitions";
    180          #address-cells = <1>;
    181          #size-cells = <1>;
    182
    183          partition@0 {
    184            label = "boot-nand";
    185            reg = <0 0x58a0000>;
    186          };
    187
    188          partition@58a0000 {
    189            label = "fs-nand";
    190            reg = <0x58a0000 0x4000000>;
    191          };
    192        };
    193      };
    194    };
    195
    196...