cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spear_smi.txt (674B)

      1* SPEAr SMI
      2
      3Required properties:
      4- compatible : "st,spear600-smi"
      5- reg : Address range of the mtd chip
      6- #address-cells, #size-cells : Must be present if the device has sub-nodes
      7  representing partitions.
      8- interrupts: Should contain the STMMAC interrupts
      9- clock-rate : Functional clock rate of SMI in Hz
     10
     11Optional properties:
     12- st,smi-fast-mode : Flash supports read in fast mode
     13
     14Example:
     15
     16	smi: flash@fc000000 {
     17		compatible = "st,spear600-smi";
     18		#address-cells = <1>;
     19		#size-cells = <1>;
     20		reg = <0xfc000000 0x1000>;
     21		interrupt-parent = <&vic1>;
     22		interrupts = <12>;
     23		clock-rate = <50000000>;	/* 50MHz */
     24
     25		flash@f8000000 {
     26			st,smi-fast-mode;
     27			...
     28		};
     29	};