cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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adi,adg792a.txt (1975B)

      1Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
      2
      3Required properties:
      4- compatible : "adi,adg792a" or "adi,adg792g"
      5- #mux-control-cells : <0> if parallel (the three muxes are bound together
      6  with a single mux controller controlling all three muxes), or <1> if
      7  not (one mux controller for each mux).
      8* Standard mux-controller bindings as described in mux-controller.yaml
      9
     10Optional properties for ADG792G:
     11- gpio-controller : if present, #gpio-cells below is required.
     12- #gpio-cells : should be <2>
     13			  - First cell is the GPO line number, i.e. 0 or 1
     14			  - Second cell is used to specify active high (0)
     15			    or active low (1)
     16
     17Optional properties:
     18- idle-state : if present, array of states that the mux controllers will have
     19  when idle. The special state MUX_IDLE_AS_IS is the default and
     20  MUX_IDLE_DISCONNECT is also supported.
     21
     22States 0 through 3 correspond to signals A through D in the datasheet.
     23
     24Example:
     25
     26	/*
     27	 * Three independent mux controllers (of which one is used).
     28	 * Mux 0 is disconnected when idle, mux 1 idles in the previously
     29	 * selected state and mux 2 idles with signal B.
     30	 */
     31	&i2c0 {
     32		mux: mux-controller@50 {
     33			compatible = "adi,adg792a";
     34			reg = <0x50>;
     35			#mux-control-cells = <1>;
     36
     37			idle-state = <MUX_IDLE_DISCONNECT MUX_IDLE_AS_IS 1>;
     38		};
     39	};
     40
     41	adc-mux {
     42		compatible = "io-channel-mux";
     43		io-channels = <&adc 0>;
     44		io-channel-names = "parent";
     45
     46		mux-controls = <&mux 2>;
     47
     48		channels = "sync-1", "", "out";
     49	};
     50
     51
     52	/*
     53	 * Three parallel muxes with one mux controller, useful e.g. if
     54	 * the adc is differential, thus needing two signals to be muxed
     55	 * simultaneously for correct operation.
     56	 */
     57	&i2c0 {
     58		pmux: mux-controller@50 {
     59			compatible = "adi,adg792a";
     60			reg = <0x50>;
     61			#mux-control-cells = <0>;
     62
     63			idle-state = <1>;
     64		};
     65	};
     66
     67	diff-adc-mux {
     68		compatible = "io-channel-mux";
     69		io-channels = <&adc 0>;
     70		io-channel-names = "parent";
     71
     72		mux-controls = <&pmux>;
     73
     74		channels = "sync-1", "", "out";
     75	};