cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun7i-a20-gmac.yaml (1204B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner A20 GMAC Device Tree Bindings
      8
      9allOf:
     10  - $ref: "snps,dwmac.yaml#"
     11
     12maintainers:
     13  - Chen-Yu Tsai <wens@csie.org>
     14  - Maxime Ripard <mripard@kernel.org>
     15
     16properties:
     17  compatible:
     18    const: allwinner,sun7i-a20-gmac
     19
     20  reg:
     21    maxItems: 1
     22
     23  interrupts:
     24    maxItems: 1
     25
     26  interrupt-names:
     27    const: macirq
     28
     29  clocks:
     30    items:
     31      - description: GMAC main clock
     32      - description: TX clock
     33
     34  clock-names:
     35    items:
     36      - const: stmmaceth
     37      - const: allwinner_gmac_tx
     38
     39  phy-supply:
     40    description:
     41      PHY regulator
     42
     43required:
     44  - compatible
     45  - reg
     46  - interrupts
     47  - interrupt-names
     48  - clocks
     49  - clock-names
     50  - phy-mode
     51
     52unevaluatedProperties: false
     53
     54examples:
     55  - |
     56    gmac: ethernet@1c50000 {
     57        compatible = "allwinner,sun7i-a20-gmac";
     58        reg = <0x01c50000 0x10000>;
     59        interrupts = <0 85 1>;
     60        interrupt-names = "macirq";
     61        clocks = <&ahb_gates 49>, <&gmac_tx>;
     62        clock-names = "stmmaceth", "allwinner_gmac_tx";
     63        phy-mode = "mii";
     64    };
     65
     66...