cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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asix,ax88178.yaml (1485B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/asix,ax88178.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: The device tree bindings for the USB Ethernet controllers
      8
      9maintainers:
     10  - Oleksij Rempel <o.rempel@pengutronix.de>
     11
     12description: |
     13  Device tree properties for hard wired USB Ethernet devices.
     14
     15allOf:
     16  - $ref: ethernet-controller.yaml#
     17
     18properties:
     19  compatible:
     20    items:
     21      - enum:
     22          - usbb95,1720   # ASIX AX88172
     23          - usbb95,172a   # ASIX AX88172A
     24          - usbb95,1780   # ASIX AX88178
     25          - usbb95,7720   # ASIX AX88772
     26          - usbb95,772a   # ASIX AX88772A
     27          - usbb95,772b   # ASIX AX88772B
     28          - usbb95,7e2b   # ASIX AX88772B
     29
     30  reg: true
     31  local-mac-address: true
     32  mac-address: true
     33
     34required:
     35  - compatible
     36  - reg
     37
     38additionalProperties: false
     39
     40examples:
     41  - |
     42    usb {
     43        #address-cells = <1>;
     44        #size-cells = <0>;
     45
     46        ethernet@1 {
     47            compatible = "usbb95,7e2b";
     48            reg = <1>;
     49            local-mac-address = [00 00 00 00 00 00];
     50        };
     51    };
     52  - |
     53    usb {
     54        #address-cells = <1>;
     55        #size-cells = <0>;
     56
     57        usb1@1 {
     58            compatible = "usb1234,5678";
     59            reg = <1>;
     60            #address-cells = <1>;
     61            #size-cells = <0>;
     62
     63            ethernet@1 {
     64               compatible = "usbb95,772b";
     65               reg = <1>;
     66            };
     67        };
     68    };