cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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arrow,xrs700x.yaml (1848B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/dsa/arrow,xrs700x.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Arrow SpeedChips XRS7000 Series Switch Device Tree Bindings
      8
      9allOf:
     10  - $ref: dsa.yaml#
     11
     12maintainers:
     13  - George McCollister <george.mccollister@gmail.com>
     14
     15description:
     16  The Arrow SpeedChips XRS7000 Series of single chip gigabit Ethernet switches
     17  are designed for critical networking applications. They have up to three
     18  RGMII ports and one RMII port and are managed via i2c or mdio.
     19
     20properties:
     21  compatible:
     22    oneOf:
     23      - enum:
     24          - arrow,xrs7003e
     25          - arrow,xrs7003f
     26          - arrow,xrs7004e
     27          - arrow,xrs7004f
     28
     29  reg:
     30    maxItems: 1
     31
     32required:
     33  - compatible
     34  - reg
     35
     36unevaluatedProperties: false
     37
     38examples:
     39  - |
     40    i2c {
     41        #address-cells = <1>;
     42        #size-cells = <0>;
     43        switch@8 {
     44            compatible = "arrow,xrs7004e";
     45            reg = <0x8>;
     46
     47            ethernet-ports {
     48                #address-cells = <1>;
     49                #size-cells = <0>;
     50                ethernet-port@1 {
     51                    reg = <1>;
     52                    label = "lan0";
     53                    phy-handle = <&swphy0>;
     54                    phy-mode = "rgmii-id";
     55                };
     56                ethernet-port@2 {
     57                    reg = <2>;
     58                    label = "lan1";
     59                    phy-handle = <&swphy1>;
     60                    phy-mode = "rgmii-id";
     61                };
     62                ethernet-port@3 {
     63                    reg = <3>;
     64                    label = "cpu";
     65                    ethernet = <&fec1>;
     66                    fixed-link {
     67                        speed = <1000>;
     68                        full-duplex;
     69                    };
     70                };
     71            };
     72        };
     73    };