cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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lantiq-gswip.txt (2993B)

      1Lantiq GSWIP Ethernet switches
      2==================================
      3
      4Required properties for GSWIP core:
      5
      6- compatible	: "lantiq,xrx200-gswip" for the embedded GSWIP in the
      7		  xRX200 SoC
      8		  "lantiq,xrx300-gswip" for the embedded GSWIP in the
      9		  xRX300 SoC
     10		  "lantiq,xrx330-gswip" for the embedded GSWIP in the
     11		  xRX330 SoC
     12- reg		: memory range of the GSWIP core registers
     13		: memory range of the GSWIP MDIO registers
     14		: memory range of the GSWIP MII registers
     15
     16See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of
     17additional required and optional properties.
     18
     19
     20Required properties for MDIO bus:
     21- compatible	: "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
     22		  core of the xRX200 SoC and the PHYs connected to it.
     23
     24See Documentation/devicetree/bindings/net/mdio.txt for a list of additional
     25required and optional properties.
     26
     27
     28Required properties for GPHY firmware loading:
     29- compatible	: "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
     30		  "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
     31		  "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
     32		  for the loading of the firmware into the embedded
     33		  GPHY core of the SoC.
     34- lantiq,rcu	: reference to the rcu syscon
     35
     36The GPHY firmware loader has a list of GPHY entries, one for each
     37embedded GPHY
     38
     39- reg		: Offset of the GPHY firmware register in the RCU
     40		  register range
     41- resets	: list of resets of the embedded GPHY
     42- reset-names	: list of names of the resets
     43
     44Example:
     45
     46Ethernet switch on the VRX200 SoC:
     47
     48switch@e108000 {
     49	#address-cells = <1>;
     50	#size-cells = <0>;
     51	compatible = "lantiq,xrx200-gswip";
     52	reg = <	0xe108000 0x3100	/* switch */
     53		0xe10b100 0xd8		/* mdio */
     54		0xe10b1d8 0x130		/* mii */
     55		>;
     56	dsa,member = <0 0>;
     57
     58	ports {
     59		#address-cells = <1>;
     60		#size-cells = <0>;
     61
     62		port@0 {
     63			reg = <0>;
     64			label = "lan3";
     65			phy-mode = "rgmii";
     66			phy-handle = <&phy0>;
     67		};
     68
     69		port@1 {
     70			reg = <1>;
     71			label = "lan4";
     72			phy-mode = "rgmii";
     73			phy-handle = <&phy1>;
     74		};
     75
     76		port@2 {
     77			reg = <2>;
     78			label = "lan2";
     79			phy-mode = "internal";
     80			phy-handle = <&phy11>;
     81		};
     82
     83		port@4 {
     84			reg = <4>;
     85			label = "lan1";
     86			phy-mode = "internal";
     87			phy-handle = <&phy13>;
     88		};
     89
     90		port@5 {
     91			reg = <5>;
     92			label = "wan";
     93			phy-mode = "rgmii";
     94			phy-handle = <&phy5>;
     95		};
     96
     97		port@6 {
     98			reg = <0x6>;
     99			label = "cpu";
    100			ethernet = <&eth0>;
    101		};
    102	};
    103
    104	mdio {
    105		#address-cells = <1>;
    106		#size-cells = <0>;
    107		compatible = "lantiq,xrx200-mdio";
    108		reg = <0>;
    109
    110		phy0: ethernet-phy@0 {
    111			reg = <0x0>;
    112		};
    113		phy1: ethernet-phy@1 {
    114			reg = <0x1>;
    115		};
    116		phy5: ethernet-phy@5 {
    117			reg = <0x5>;
    118		};
    119		phy11: ethernet-phy@11 {
    120			reg = <0x11>;
    121		};
    122		phy13: ethernet-phy@13 {
    123			reg = <0x13>;
    124		};
    125	};
    126
    127	gphy-fw {
    128		compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
    129		lantiq,rcu = <&rcu0>;
    130		#address-cells = <1>;
    131		#size-cells = <0>;
    132
    133		gphy@20 {
    134			reg = <0x20>;
    135
    136			resets = <&reset0 31 30>;
    137			reset-names = "gphy";
    138		};
    139
    140		gphy@68 {
    141			reg = <0x68>;
    142
    143			resets = <&reset0 29 28>;
    144			reset-names = "gphy";
    145		};
    146	};
    147};