cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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marvell.txt (3248B)


      1Marvell DSA Switch Device Tree Bindings
      2---------------------------------------
      3
      4WARNING: This binding is currently unstable. Do not program it into a
      5FLASH never to be changed again. Once this binding is stable, this
      6warning will be removed.
      7
      8If you need a stable binding, use the old dsa.txt binding.
      9
     10Marvell Switches are MDIO devices. The following properties should be
     11placed as a child node of an mdio device.
     12
     13The properties described here are those specific to Marvell devices.
     14Additional required and optional properties can be found in dsa.txt.
     15
     16The compatibility string is used only to find an identification register,
     17which is at a different MDIO base address in different switch families.
     18- "marvell,mv88e6085"	: Switch has base address 0x10. Use with models:
     19			  6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165,
     20			  6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321,
     21			  6341, 6350, 6351, 6352
     22- "marvell,mv88e6190"	: Switch has base address 0x00. Use with models:
     23			  6190, 6190X, 6191, 6290, 6390, 6390X
     24- "marvell,mv88e6250"	: Switch has base address 0x08 or 0x18. Use with model:
     25			  6220, 6250
     26
     27Required properties:
     28- compatible		: Should be one of "marvell,mv88e6085",
     29			  "marvell,mv88e6190" or "marvell,mv88e6250" as
     30			  indicated above
     31- reg			: Address on the MII bus for the switch.
     32
     33Optional properties:
     34
     35- reset-gpios		: Should be a gpio specifier for a reset line
     36- interrupts		: Interrupt from the switch
     37- interrupt-controller	: Indicates the switch is itself an interrupt
     38			  controller. This is used for the PHY interrupts.
     39#interrupt-cells = <2>	: Controller uses two cells, number and flag
     40- eeprom-length		: Set to the length of an EEPROM connected to the
     41			  switch. Must be set if the switch can not detect
     42			  the presence and/or size of a connected EEPROM,
     43			  otherwise optional.
     44- mdio			: Container of PHY and devices on the switches MDIO
     45			  bus.
     46- mdio?		: Container of PHYs and devices on the external MDIO
     47			  bus. The node must contains a compatible string of
     48			  "marvell,mv88e6xxx-mdio-external"
     49
     50Example:
     51
     52	mdio {
     53		#address-cells = <1>;
     54		#size-cells = <0>;
     55		interrupt-parent = <&gpio0>;
     56		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
     57		interrupt-controller;
     58		#interrupt-cells = <2>;
     59
     60		switch0: switch@0 {
     61			compatible = "marvell,mv88e6085";
     62			reg = <0>;
     63			reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
     64
     65			mdio {
     66				#address-cells = <1>;
     67				#size-cells = <0>;
     68				switch1phy0: switch1phy0@0 {
     69					reg = <0>;
     70					interrupt-parent = <&switch0>;
     71					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
     72				};
     73			};
     74		};
     75	};
     76
     77	mdio {
     78		#address-cells = <1>;
     79		#size-cells = <0>;
     80		interrupt-parent = <&gpio0>;
     81		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
     82		interrupt-controller;
     83		#interrupt-cells = <2>;
     84
     85		switch0: switch@0 {
     86			compatible = "marvell,mv88e6190";
     87			reg = <0>;
     88			reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
     89
     90			mdio {
     91				#address-cells = <1>;
     92				#size-cells = <0>;
     93				switch1phy0: switch1phy0@0 {
     94					reg = <0>;
     95					interrupt-parent = <&switch0>;
     96					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
     97				};
     98			};
     99
    100			mdio1 {
    101				compatible = "marvell,mv88e6xxx-mdio-external";
    102				#address-cells = <1>;
    103				#size-cells = <0>;
    104				switch1phy9: switch1phy0@9 {
    105					reg = <9>;
    106				};
    107			};
    108		};
    109	};