cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mcr20a.txt (612B)

      1* MCR20A IEEE 802.15.4 *
      2
      3Required properties:
      4  - compatible:		should be "nxp,mcr20a"
      5  - spi-max-frequency:	maximal bus speed, should be set to a frequency
      6			lower than 9000000 depends sync or async operation mode
      7  - reg:		the chipselect index
      8  - interrupts:		the interrupt generated by the device. Non high-level
      9			can occur deadlocks while handling isr.
     10
     11Optional properties:
     12  - rst_b-gpio:		GPIO spec for the RST_B pin
     13
     14Example:
     15
     16	mcr20a@0 {
     17		compatible = "nxp,mcr20a";
     18		spi-max-frequency = <9000000>;
     19		reg = <0>;
     20		interrupts = <17 2>;
     21		interrupt-parent = <&gpio>;
     22		rst_b-gpio = <&gpio 27 1>
     23	};