ingenic,mac.yaml (1558B)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Bindings for MAC in Ingenic SoCs 8 9maintainers: 10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 11 12description: 13 The Ethernet Media Access Controller in Ingenic SoCs. 14 15properties: 16 compatible: 17 enum: 18 - ingenic,jz4775-mac 19 - ingenic,x1000-mac 20 - ingenic,x1600-mac 21 - ingenic,x1830-mac 22 - ingenic,x2000-mac 23 24 reg: 25 maxItems: 1 26 27 interrupts: 28 maxItems: 1 29 30 interrupt-names: 31 const: macirq 32 33 clocks: 34 maxItems: 1 35 36 clock-names: 37 const: stmmaceth 38 39 mode-reg: 40 $ref: /schemas/types.yaml#/definitions/phandle 41 description: An extra syscon register that control ethernet interface and timing delay 42 43 rx-clk-delay-ps: 44 description: RGMII receive clock delay defined in pico seconds 45 46 tx-clk-delay-ps: 47 description: RGMII transmit clock delay defined in pico seconds 48 49required: 50 - compatible 51 - reg 52 - interrupts 53 - interrupt-names 54 - clocks 55 - clock-names 56 - mode-reg 57 58additionalProperties: false 59 60examples: 61 - | 62 #include <dt-bindings/clock/ingenic,x1000-cgu.h> 63 64 mac: ethernet@134b0000 { 65 compatible = "ingenic,x1000-mac"; 66 reg = <0x134b0000 0x2000>; 67 68 interrupt-parent = <&intc>; 69 interrupts = <55>; 70 interrupt-names = "macirq"; 71 72 clocks = <&cgu X1000_CLK_MAC>; 73 clock-names = "stmmaceth"; 74 75 mode-reg = <&mac_phy_ctrl>; 76 }; 77...