cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel,ixp46x-ptp-timer.yaml (1406B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2# Copyright 2018 Linaro Ltd.
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Intel IXP46x PTP Timer (TSYNC)
      9
     10maintainers:
     11  - Linus Walleij <linus.walleij@linaro.org>
     12
     13description: |
     14  The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
     15  Assist and Time Synchronization Hardware Assist TSYNC provides a PTP
     16  timer. It exists in the Intel IXP45x and IXP46x XScale SoCs.
     17
     18properties:
     19  compatible:
     20    const: intel,ixp46x-ptp-timer
     21
     22  reg:
     23    maxItems: 1
     24
     25  interrupts:
     26    items:
     27      - description: Interrupt to trigger master mode snapshot from the
     28          PRP timer, usually a GPIO interrupt.
     29      - description: Interrupt to trigger slave mode snapshot from the
     30          PRP timer, usually a GPIO interrupt.
     31
     32  interrupt-names:
     33    items:
     34      - const: master
     35      - const: slave
     36
     37required:
     38  - compatible
     39  - reg
     40  - interrupts
     41  - interrupt-names
     42
     43additionalProperties: false
     44
     45examples:
     46  - |
     47    #include <dt-bindings/interrupt-controller/irq.h>
     48    ptp-timer@c8010000 {
     49        compatible = "intel,ixp46x-ptp-timer";
     50        reg = <0xc8010000 0x1000>;
     51        interrupt-parent = <&gpio0>;
     52        interrupts = <8 IRQ_TYPE_EDGE_FALLING>, <7 IRQ_TYPE_EDGE_FALLING>;
     53        interrupt-names = "master", "slave";
     54    };