cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mdio.yaml (3151B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/mdio.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: MDIO Bus Generic Binding
      8
      9maintainers:
     10  - Andrew Lunn <andrew@lunn.ch>
     11  - Florian Fainelli <f.fainelli@gmail.com>
     12  - Heiner Kallweit <hkallweit1@gmail.com>
     13
     14description:
     15  These are generic properties that can apply to any MDIO bus. Any
     16  MDIO bus must have a list of child nodes, one per device on the
     17  bus. These should follow the generic ethernet-phy.yaml document, or
     18  a device specific binding document.
     19
     20properties:
     21  $nodename:
     22    pattern: "^mdio(@.*)?"
     23
     24  "#address-cells":
     25    const: 1
     26
     27  "#size-cells":
     28    const: 0
     29
     30  reset-gpios:
     31    maxItems: 1
     32    description:
     33      The phandle and specifier for the GPIO that controls the RESET
     34      lines of all devices on that MDIO bus.
     35
     36  reset-delay-us:
     37    description:
     38      RESET pulse width in microseconds. It applies to all MDIO devices
     39      and must therefore be appropriately determined based on all devices
     40      requirements (maximum value of all per-device RESET pulse widths).
     41
     42  reset-post-delay-us:
     43    description:
     44      Delay after reset deassert in microseconds. It applies to all MDIO
     45      devices and it's determined by how fast all devices are ready for
     46      communication. This delay happens just before e.g. Ethernet PHY
     47      type ID auto detection.
     48
     49  clock-frequency:
     50    description:
     51      Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
     52      defined 2.5MHz should only be used when all devices on the bus support
     53      the given clock speed.
     54
     55  suppress-preamble:
     56    description:
     57      The 32 bit preamble should be suppressed. In order for this to
     58      work, all devices on the bus must support suppressed preamble.
     59    type: boolean
     60
     61patternProperties:
     62  '@[0-9a-f]+$':
     63    type: object
     64
     65    properties:
     66      reg:
     67        minimum: 0
     68        maximum: 31
     69        description:
     70          The ID number for the device.
     71
     72      broken-turn-around:
     73        $ref: /schemas/types.yaml#/definitions/flag
     74        description:
     75          If set, indicates the MDIO device does not correctly release
     76          the turn around line low at end of the control phase of the
     77          MDIO transaction.
     78
     79      reset-gpios:
     80        maxItems: 1
     81        description:
     82          The GPIO phandle and specifier for the MDIO reset signal.
     83
     84      reset-assert-us:
     85        description:
     86          Delay after the reset was asserted in microseconds. If this
     87          property is missing the delay will be skipped.
     88
     89      reset-deassert-us:
     90        description:
     91          Delay after the reset was deasserted in microseconds. If
     92          this property is missing the delay will be skipped.
     93
     94    required:
     95      - reg
     96
     97additionalProperties: true
     98
     99examples:
    100  - |
    101    davinci_mdio: mdio@5c030000 {
    102        reg = <0x5c030000 0x1000>;
    103        #address-cells = <1>;
    104        #size-cells = <0>;
    105
    106        reset-gpios = <&gpio2 5 1>;
    107        reset-delay-us = <2>;
    108
    109        ethphy0: ethernet-phy@1 {
    110            reg = <1>;
    111        };
    112
    113        ethphy1: ethernet-phy@3 {
    114            reg = <3>;
    115        };
    116    };