cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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microchip,lan78xx.txt (1382B)


      1Microchip LAN78xx Gigabit Ethernet controller
      2
      3The LAN78XX devices are usually configured by programming their OTP or with
      4an external EEPROM, but some platforms (e.g. Raspberry Pi 3 B+) have neither.
      5The Device Tree properties, if present, override the OTP and EEPROM.
      6
      7Required properties:
      8- compatible: Should be one of "usb424,7800", "usb424,7801" or "usb424,7850".
      9
     10The MAC address will be determined using the optional properties
     11defined in ethernet.txt.
     12
     13Optional properties of the embedded PHY:
     14- microchip,led-modes: a 0..4 element vector, with each element configuring
     15  the operating mode of an LED. Omitted LEDs are turned off. Allowed values
     16  are defined in "include/dt-bindings/net/microchip-lan78xx.h".
     17
     18Example:
     19
     20/* Based on the configuration for a Raspberry Pi 3 B+ */
     21&usb {
     22	usb-port@1 {
     23		compatible = "usb424,2514";
     24		reg = <1>;
     25		#address-cells = <1>;
     26		#size-cells = <0>;
     27
     28		usb-port@1 {
     29			compatible = "usb424,2514";
     30			reg = <1>;
     31			#address-cells = <1>;
     32			#size-cells = <0>;
     33
     34			ethernet: ethernet@1 {
     35				compatible = "usb424,7800";
     36				reg = <1>;
     37				local-mac-address = [ 00 11 22 33 44 55 ];
     38
     39				mdio {
     40					#address-cells = <0x1>;
     41					#size-cells = <0x0>;
     42					eth_phy: ethernet-phy@1 {
     43						reg = <1>;
     44						microchip,led-modes = <
     45							LAN78XX_LINK_1000_ACTIVITY
     46							LAN78XX_LINK_10_100_ACTIVITY
     47						>;
     48					};
     49				};
     50			};
     51		};
     52	};
     53};