cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nxp,dwmac-imx.yaml (2565B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NXP i.MX8 DWMAC glue layer Device Tree Bindings
      8
      9maintainers:
     10  - Joakim Zhang <qiangqing.zhang@nxp.com>
     11
     12# We need a select here so we don't match all nodes with 'snps,dwmac'
     13select:
     14  properties:
     15    compatible:
     16      contains:
     17        enum:
     18          - nxp,imx8mp-dwmac-eqos
     19          - nxp,imx8dxl-dwmac-eqos
     20  required:
     21    - compatible
     22
     23allOf:
     24  - $ref: "snps,dwmac.yaml#"
     25
     26properties:
     27  compatible:
     28    oneOf:
     29      - items:
     30          - enum:
     31              - nxp,imx8mp-dwmac-eqos
     32              - nxp,imx8dxl-dwmac-eqos
     33          - const: snps,dwmac-5.10a
     34
     35  clocks:
     36    minItems: 3
     37    items:
     38      - description: MAC host clock
     39      - description: MAC apb clock
     40      - description: MAC timer clock
     41      - description: MAC RGMII TX clock
     42      - description: EQOS MEM clock
     43
     44  clock-names:
     45    minItems: 3
     46    maxItems: 5
     47    contains:
     48      enum:
     49        - stmmaceth
     50        - pclk
     51        - ptp_ref
     52        - tx
     53        - mem
     54
     55  intf_mode:
     56    $ref: /schemas/types.yaml#/definitions/phandle-array
     57    items:
     58      - items:
     59          - description: phandle to the GPR syscon
     60          - description: the offset of the GPR register
     61    description:
     62      Should be phandle/offset pair. The phandle to the syscon node which
     63      encompases the GPR register, and the offset of the GPR register.
     64
     65  snps,rmii_refclk_ext:
     66    $ref: /schemas/types.yaml#/definitions/flag
     67    description:
     68      To select RMII reference clock from external.
     69
     70required:
     71  - compatible
     72  - clocks
     73  - clock-names
     74
     75unevaluatedProperties: false
     76
     77examples:
     78  - |
     79    #include <dt-bindings/interrupt-controller/arm-gic.h>
     80    #include <dt-bindings/interrupt-controller/irq.h>
     81    #include <dt-bindings/clock/imx8mp-clock.h>
     82
     83    eqos: ethernet@30bf0000 {
     84            compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
     85            reg = <0x30bf0000 0x10000>;
     86            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
     87                         <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
     88            interrupt-names = "macirq", "eth_wake_irq";
     89            clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
     90                     <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
     91                     <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
     92                     <&clk IMX8MP_CLK_ENET_QOS>;
     93            clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
     94            phy-mode = "rgmii";
     95            status = "disabled";
     96    };