cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nxp,tja11xx.yaml (1310B)


      1# SPDX-License-Identifier: GPL-2.0+
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/nxp,tja11xx.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NXP TJA11xx PHY
      8
      9maintainers:
     10  - Andrew Lunn <andrew@lunn.ch>
     11  - Florian Fainelli <f.fainelli@gmail.com>
     12  - Heiner Kallweit <hkallweit1@gmail.com>
     13
     14description:
     15  Bindings for NXP TJA11xx automotive PHYs
     16
     17allOf:
     18  - $ref: ethernet-phy.yaml#
     19
     20patternProperties:
     21  "^ethernet-phy@[0-9a-f]+$":
     22    type: object
     23    description: |
     24      Some packages have multiple PHYs. Secondary PHY should be defines as
     25      subnode of the first (parent) PHY.
     26
     27    properties:
     28      reg:
     29        minimum: 0
     30        maximum: 31
     31        description:
     32          The ID number for the child PHY. Should be +1 of parent PHY.
     33
     34    required:
     35      - reg
     36
     37unevaluatedProperties: false
     38
     39examples:
     40  - |
     41    mdio {
     42        #address-cells = <1>;
     43        #size-cells = <0>;
     44
     45        tja1101_phy0: ethernet-phy@4 {
     46            reg = <0x4>;
     47        };
     48    };
     49  - |
     50    mdio {
     51        #address-cells = <1>;
     52        #size-cells = <0>;
     53
     54        tja1102_phy0: ethernet-phy@4 {
     55            reg = <0x4>;
     56            #address-cells = <1>;
     57            #size-cells = <0>;
     58
     59            tja1102_phy1: ethernet-phy@5 {
     60                reg = <0x5>;
     61            };
     62        };
     63    };