cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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marvell-8xxx.txt (2523B)

      1Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices
      2------
      3
      4This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
      5The node is expected to be specified as a child node to the SDIO/PCIE controller that
      6connects the device to the system.
      7
      8Required properties:
      9
     10  - compatible : should be one of the following:
     11	* "marvell,sd8787"
     12	* "marvell,sd8897"
     13	* "marvell,sd8997"
     14	* "pci11ab,2b42"
     15	* "pci1b4b,2b42"
     16
     17Optional properties:
     18
     19  - marvell,caldata* : A series of properties with marvell,caldata prefix,
     20		      represent calibration data downloaded to the device during
     21		      initialization. This is an array of unsigned 8-bit values.
     22		      the properties should follow below property name and
     23		      corresponding array length:
     24	"marvell,caldata-txpwrlimit-2g" (length = 566).
     25	"marvell,caldata-txpwrlimit-5g-sub0" (length = 502).
     26	"marvell,caldata-txpwrlimit-5g-sub1" (length = 688).
     27	"marvell,caldata-txpwrlimit-5g-sub2" (length = 750).
     28	"marvell,caldata-txpwrlimit-5g-sub3" (length = 502).
     29  - marvell,wakeup-pin : a wakeup pin number of wifi chip which will be configured
     30		      to firmware. Firmware will wakeup the host using this pin
     31		      during suspend/resume.
     32  - interrupts : interrupt pin number to the cpu. driver will request an irq based on
     33		 this interrupt number. during system suspend, the irq will be enabled
     34		 so that the wifi chip can wakeup host platform under certain condition.
     35		 during system resume, the irq will be disabled to make sure
     36		 unnecessary interrupt is not received.
     37  - vmmc-supply: a phandle of a regulator, supplying VCC to the card
     38  - mmc-pwrseq:  phandle to the MMC power sequence node. See "mmc-pwrseq-*"
     39		 for documentation of MMC power sequence bindings.
     40
     41Example:
     42
     43Tx power limit calibration data is configured in below example.
     44The calibration data is an array of unsigned values, the length
     45can vary between hw versions.
     46IRQ pin 38 is used as system wakeup source interrupt. wakeup pin 3 is configured
     47so that firmware can wakeup host using this device side pin.
     48
     49&mmc3 {
     50	vmmc-supply = <&wlan_en_reg>;
     51	mmc-pwrseq = <&wifi_pwrseq>;
     52	bus-width = <4>;
     53	cap-power-off-card;
     54	keep-power-in-suspend;
     55
     56	#address-cells = <1>;
     57	#size-cells = <0>;
     58	mwifiex: wifi@1 {
     59		compatible = "marvell,sd8897";
     60		reg = <1>;
     61		interrupt-parent = <&pio>;
     62		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
     63
     64		marvell,caldata_00_txpwrlimit_2g_cfg_set = /bits/ 8 <
     65	0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01>;
     66		marvell,wakeup-pin = <3>;
     67	};
     68};