cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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microchip,wilc1000.yaml (2346B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Microchip WILC wireless devicetree bindings
      8
      9maintainers:
     10  - Adham Abozaeid <adham.abozaeid@microchip.com>
     11  - Ajay Singh <ajay.kathat@microchip.com>
     12
     13description:
     14  The wilc1000 chips can be connected via SPI or SDIO. This document
     15  describes the binding to connect wilc devices.
     16
     17properties:
     18  compatible:
     19    const: microchip,wilc1000
     20
     21  reg: true
     22
     23  spi-max-frequency: true
     24
     25  interrupts:
     26    maxItems: 1
     27
     28  clocks:
     29    description: phandle to the clock connected on rtc clock line.
     30    maxItems: 1
     31
     32  clock-names:
     33    const: rtc
     34
     35  enable-gpios:
     36    maxItems: 1
     37    description: Used by wilc1000-spi to determine the GPIO line
     38      connected to the ENABLE line.  If specified, reset-gpios
     39      must be specified as well as otherwise the driver cannot
     40      ensure the timing required between asserting ENABLE
     41      and deasserting RESET.  This should be declared as an
     42      active-high signal.
     43
     44  reset-gpios:
     45    maxItems: 1
     46    description: Used by wilc1000-spi to determine the GPIO line
     47      connected to the RESET line.  This should be declared as an
     48      active-low signal.
     49
     50required:
     51  - compatible
     52  - interrupts
     53
     54additionalProperties: false
     55
     56examples:
     57  - |
     58    #include <dt-bindings/gpio/gpio.h>
     59
     60    spi {
     61      #address-cells = <1>;
     62      #size-cells = <0>;
     63      wifi@0 {
     64        compatible = "microchip,wilc1000";
     65        spi-max-frequency = <48000000>;
     66        reg = <0>;
     67        interrupt-parent = <&pioC>;
     68        interrupts = <27 0>;
     69        clocks = <&pck1>;
     70        clock-names = "rtc";
     71        enable-gpios = <&pioA 5 GPIO_ACTIVE_HIGH>;
     72        reset-gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
     73      };
     74    };
     75
     76  - |
     77    mmc {
     78      #address-cells = <1>;
     79      #size-cells = <0>;
     80      pinctrl-names = "default";
     81      pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
     82      non-removable;
     83      vmmc-supply = <&vcc_mmc1_reg>;
     84      vqmmc-supply = <&vcc_3v3_reg>;
     85      bus-width = <4>;
     86      wifi@0 {
     87        compatible = "microchip,wilc1000";
     88        reg = <0>;
     89        interrupt-parent = <&pioC>;
     90        interrupts = <27 0>;
     91        clocks = <&pck1>;
     92        clock-names = "rtc";
     93      };
     94    };