cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,wlcore.yaml (3250B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/net/wireless/ti,wlcore.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Texas Instruments Wilink 6/7/8 (wl12xx/wl18xx) Wireless LAN Controller
      8
      9maintainers:
     10  - Tony Lindgren <tony@atomide.com>
     11
     12description:
     13  The wl12xx/wl18xx chips can be connected via SPI or via SDIO.
     14  Note that the *-clock-frequency properties assume internal clocks.  In case
     15  of external clocks, new bindings (for parsing the clock nodes) have to be
     16  added.
     17
     18properties:
     19  compatible:
     20    enum:
     21      - ti,wl1271
     22      - ti,wl1273
     23      - ti,wl1281
     24      - ti,wl1283
     25      - ti,wl1285
     26      - ti,wl1801
     27      - ti,wl1805
     28      - ti,wl1807
     29      - ti,wl1831
     30      - ti,wl1835
     31      - ti,wl1837
     32
     33  reg:
     34    maxItems: 1
     35    description:
     36      This is required when connected via SPI, and optional when connected via
     37      SDIO.
     38
     39  spi-max-frequency: true
     40
     41  interrupts:
     42    minItems: 1
     43    maxItems: 2
     44
     45  interrupt-names:
     46    items:
     47      - const: irq
     48      - const: wakeup
     49
     50  vwlan-supply:
     51    description:
     52      Points to the node of the regulator that powers/enable the wl12xx/wl18xx
     53      chip.  This is required when connected via SPI.
     54
     55
     56  ref-clock-frequency:
     57    $ref: /schemas/types.yaml#/definitions/uint32
     58    description: Reference clock frequency.
     59
     60  tcxo-clock-frequency:
     61    $ref: /schemas/types.yaml#/definitions/uint32
     62    description: TCXO clock frequency.
     63
     64  clock-xtal:
     65    $ref: /schemas/types.yaml#/definitions/flag
     66    description: Indicates that the clock is generated from XTAL.
     67
     68required:
     69  - compatible
     70  - interrupts
     71
     72if:
     73  properties:
     74    compatible:
     75      contains:
     76        enum:
     77          - ti,wl1271
     78          - ti,wl1273
     79          - ti,wl1281
     80          - ti,wl1283
     81then:
     82  required:
     83    - ref-clock-frequency
     84
     85additionalProperties: false
     86
     87examples:
     88  - |
     89    #include <dt-bindings/interrupt-controller/irq.h>
     90
     91    // For wl12xx family:
     92    spi1 {
     93            #address-cells = <1>;
     94            #size-cells = <0>;
     95
     96            wlcore1: wlcore@1 {
     97                    compatible = "ti,wl1271";
     98                    reg = <1>;
     99                    spi-max-frequency = <48000000>;
    100                    interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
    101                    vwlan-supply = <&vwlan_fixed>;
    102                    clock-xtal;
    103                    ref-clock-frequency = <38400000>;
    104            };
    105    };
    106
    107    // For wl18xx family:
    108    spi2 {
    109            #address-cells = <1>;
    110            #size-cells = <0>;
    111
    112            wlcore2: wlcore@0 {
    113                    compatible = "ti,wl1835";
    114                    reg = <0>;
    115                    spi-max-frequency = <48000000>;
    116                    interrupts = <27 IRQ_TYPE_EDGE_RISING>;
    117                    vwlan-supply = <&vwlan_fixed>;
    118            };
    119    };
    120
    121    // SDIO example:
    122    mmc3 {
    123            vmmc-supply = <&wlan_en_reg>;
    124            bus-width = <4>;
    125            cap-power-off-card;
    126            keep-power-in-suspend;
    127
    128            #address-cells = <1>;
    129            #size-cells = <0>;
    130
    131            wlcore3: wlcore@2 {
    132                    compatible = "ti,wl1835";
    133                    reg = <2>;
    134                    interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
    135            };
    136    };